src/arch/riscv/process.cc

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * Copyright (c) 2016 The University of Virginia
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are
   8  * met: redistributions of source code must retain the above copyright
   9  * notice, this list of conditions and the following disclaimer;
  10  * redistributions in binary form must reproduce the above copyright
  11  * notice, this list of conditions and the following disclaimer in the
  12  * documentation and/or other materials provided with the distribution;
  13  * neither the name of the copyright holders nor the names of its
  14  * contributors may be used to endorse or promote products derived from
  15  * this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  *
  29  * Authors: Gabe Black
  30  *          Ali Saidi
  31  *          Korey Sewell
  32  *          Alec Roelke
  33  */
  34 #include "arch/riscv/process.hh"
  35
  36 #include <algorithm>
  37 #include <cstddef>
  38 #include <iostream>
  39 #include <map>
  40 #include <string>
  41 #include <vector>
  42
  43 #include "arch/riscv/isa_traits.hh"
  44 #include "base/loader/elf_object.hh"
  45 #include "base/loader/object_file.hh"
  46 #include "base/misc.hh"
  47 #include "cpu/thread_context.hh"
  48 #include "debug/Stack.hh"
  49 #include "mem/page_table.hh"
  50 #include "params/Process.hh"
  51 #include "sim/aux_vector.hh"
  52 #include "sim/process.hh"
  53 #include "sim/process_impl.hh"
  54 #include "sim/syscall_return.hh"
  55 #include "sim/system.hh"
  56
  57 using namespace std;
  58 using namespace RiscvISA;
  59
  60 RiscvProcess::RiscvProcess(ProcessParams * params,
  61     ObjectFile *objFile) : Process(params, objFile)
  62 {
  63     const Addr stack_base = 0x7FFFFFFFFFFFFFFFL;
  64     const Addr max_stack_size = PageBytes * 64;
  65     const Addr next_thread_stack_base = stack_base - max_stack_size;
  66     const Addr brk_point = roundUp(objFile->bssBase() + objFile->bssSize(),
  67             PageBytes);
  68     const Addr mmap_end = 0x4000000000000000L;
  69     memState = make_shared<MemState>(brk_point, stack_base, max_stack_size,
  70             next_thread_stack_base, mmap_end);
  71 }
  72
  73 void
  74 RiscvProcess::initState()
  75 {
  76     Process::initState();
  77
  78     argsInit<uint64_t>(PageBytes);
  79 }
  80
  81 template<class IntType> void
  82 RiscvProcess::argsInit(int pageSize)
  83 {
  84     updateBias();
  85     objFile->loadSections(initVirtMem);
  86     ElfObject* elfObject = dynamic_cast<ElfObject*>(objFile);
  87     memState->setStackMin(memState->getStackBase());
  88
  89     // Determine stack size and populate auxv
  90     Addr stack_top = memState->getStackMin();
  91     stack_top -= elfObject->programHeaderSize();
  92     for (const string& arg: argv)
  93         stack_top -= arg.size() + 1;
  94     for (const string& env: envp)
  95         stack_top -= env.size() + 1;
  96     stack_top &= -sizeof(Addr);
  97
  98     vector<AuxVector<IntType>> auxv;
  99     if (elfObject != nullptr) {
 100         auxv.push_back({M5_AT_ENTRY, objFile->entryPoint()});
 101         auxv.push_back({M5_AT_PHNUM, elfObject->programHeaderCount()});
 102         auxv.push_back({M5_AT_PHENT, elfObject->programHeaderSize()});
 103         auxv.push_back({M5_AT_PHDR, elfObject->programHeaderTable()});
 104         auxv.push_back({M5_AT_PAGESZ, PageBytes});
 105         auxv.push_back({M5_AT_SECURE, 0});
 106         auxv.push_back({M5_AT_RANDOM, stack_top});
 107         auxv.push_back({M5_AT_NULL, 0});
 108     }
 109     stack_top -= (1 + argv.size()) * sizeof(Addr) +
 110                    (1 + envp.size()) * sizeof(Addr) +
 111                    sizeof(Addr) + 2 * sizeof(IntType) * auxv.size();
 112     stack_top &= -2*sizeof(Addr);
 113     memState->setStackSize(memState->getStackBase() - stack_top);
 114     allocateMem(roundDown(stack_top, pageSize),
 115             roundUp(memState->getStackSize(), pageSize));
 116
 117     // Copy program headers to stack
 118     memState->setStackMin(memState->getStackMin() -
 119             elfObject->programHeaderSize());
 120     uint8_t* phdr = new uint8_t[elfObject->programHeaderSize()];
 121     initVirtMem.readBlob(elfObject->programHeaderTable(), phdr,
 122             elfObject->programHeaderSize());
 123     initVirtMem.writeBlob(memState->getStackMin(), phdr,
 124             elfObject->programHeaderSize());
 125     delete phdr;
 126
 127     // Copy argv to stack
 128     vector<Addr> argPointers;
 129     for (const string& arg: argv) {
 130         memState->setStackMin(memState->getStackMin() - (arg.size() + 1));
 131         initVirtMem.writeString(memState->getStackMin(), arg.c_str());
 132         argPointers.push_back(memState->getStackMin());
 133         if (DTRACE(Stack)) {
 134             string wrote;
 135             initVirtMem.readString(wrote, argPointers.back());
 136             DPRINTFN("Wrote arg \"%s\" to address %p\n",
 137                     wrote, (void*)memState->getStackMin());
 138         }
 139     }
 140     argPointers.push_back(0);
 141
 142     // Copy envp to stack
 143     vector<Addr> envPointers;
 144     for (const string& env: envp) {
 145         memState->setStackMin(memState->getStackMin() - (env.size() + 1));
 146         initVirtMem.writeString(memState->getStackMin(), env.c_str());
 147         envPointers.push_back(memState->getStackMin());
 148         DPRINTF(Stack, "Wrote env \"%s\" to address %p\n",
 149                 env, (void*)memState->getStackMin());
 150     }
 151     envPointers.push_back(0);
 152
 153     // Align stack
 154     memState->setStackMin(memState->getStackMin() & -sizeof(Addr));
 155
 156     // Calculate bottom of stack
 157     memState->setStackMin(memState->getStackMin() -
 158             ((1 + argv.size()) * sizeof(Addr) +
 159              (1 + envp.size()) * sizeof(Addr) +
 160              sizeof(Addr) + 2 * sizeof(IntType) * auxv.size()));
 161     memState->setStackMin(memState->getStackMin() & -2*sizeof(Addr));
 162     Addr sp = memState->getStackMin();
 163     const auto pushOntoStack =
 164         [this, &sp](const uint8_t* data, const size_t size) {
 165             initVirtMem.writeBlob(sp, data, size);
 166             sp += size;
 167         };
 168
 169     // Push argc and argv pointers onto stack
 170     IntType argc = htog((IntType)argv.size());
 171     DPRINTF(Stack, "Wrote argc %d to address %p\n",
 172             argv.size(), (void*)sp);
 173     pushOntoStack((uint8_t*)&argc, sizeof(IntType));
 174     for (const Addr& argPointer: argPointers) {
 175         DPRINTF(Stack, "Wrote argv pointer %p to address %p\n",
 176                 (void*)argPointer, (void*)sp);
 177         pushOntoStack((uint8_t*)&argPointer, sizeof(Addr));
 178     }
 179
 180     // Push env pointers onto stack
 181     for (const Addr& envPointer: envPointers) {
 182         DPRINTF(Stack, "Wrote envp pointer %p to address %p\n",
 183                 (void*)envPointer, (void*)sp);
 184         pushOntoStack((uint8_t*)&envPointer, sizeof(Addr));
 185     }
 186
 187     // Push aux vector onto stack
 188     std::map<IntType, string> aux_keys = {
 189         {M5_AT_ENTRY, "M5_AT_ENTRY"},
 190         {M5_AT_PHNUM, "M5_AT_PHNUM"},
 191         {M5_AT_PHENT, "M5_AT_PHENT"},
 192         {M5_AT_PHDR, "M5_AT_PHDR"},
 193         {M5_AT_PAGESZ, "M5_AT_PAGESZ"},
 194         {M5_AT_SECURE, "M5_AT_SECURE"},
 195         {M5_AT_RANDOM, "M5_AT_RANDOM"},
 196         {M5_AT_NULL, "M5_AT_NULL"}
 197     };
 198     for (const AuxVector<IntType>& aux: auxv) {
 199         DPRINTF(Stack, "Wrote aux key %s to address %p\n",
 200                 aux_keys[aux.a_type], (void*)sp);
 201         pushOntoStack((uint8_t*)&aux.a_type, sizeof(IntType));
 202         DPRINTF(Stack, "Wrote aux value %x to address %p\n",
 203                 aux.a_val, (void*)sp);
 204         pushOntoStack((uint8_t*)&aux.a_val, sizeof(IntType));
 205     }
 206
 207     ThreadContext *tc = system->getThreadContext(contextIds[0]);
 208     tc->setIntReg(StackPointerReg, memState->getStackMin());
 209     tc->pcState(getStartPC());
 210
 211     memState->setStackMin(roundDown(memState->getStackMin(), pageSize));
 212 }
 213
 214 RiscvISA::IntReg
 215 RiscvProcess::getSyscallArg(ThreadContext *tc, int &i)
 216 {
 217     // RISC-V only has four system call argument registers by convention, so
 218     // if a larger index is requested return 0
 219     RiscvISA::IntReg retval = 0;
 220     if (i < 4)
 221         retval = tc->readIntReg(SyscallArgumentRegs[i]);
 222     i++;
 223     return retval;
 224 }
 225
 226 void
 227 RiscvProcess::setSyscallArg(ThreadContext *tc, int i, RiscvISA::IntReg val)
 228 {
 229     tc->setIntReg(SyscallArgumentRegs[i], val);
 230 }
 231
 232 void
 233 RiscvProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
 234 {
 235     if (sysret.successful()) {
 236         // no error
 237         tc->setIntReg(SyscallPseudoReturnReg, sysret.returnValue());
 238     } else {
 239         // got an error, return details
 240         tc->setIntReg(SyscallPseudoReturnReg, sysret.errnoValue());
 241     }
 242 }