x86: Replace the .serializing directive with .serialize_(before|after).
[gem5.git] / src / arch / riscv / vtophys.hh
1 /*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007-2008 The Florida State University
4 * Copyright (c) 2009 The University of Edinburgh
5 * Copyright (c) 2014-2015 Sven Karlsson
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are
10 * met: redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer;
12 * redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution;
15 * neither the name of the copyright holders nor the names of its
16 * contributors may be used to endorse or promote products derived from
17 * this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
22 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
23 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
25 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * Authors: Ali Saidi
32 * Nathan Binkert
33 * Stephen Hines
34 * Timothy M. Jones
35 * Sven Karlsson
36 */
37
38 #ifndef __ARCH_RISCV_VTOPHYS_HH__
39 #define __ARCH_RISCV_VTOPHYS_HH__
40
41 #include "arch/riscv/isa_traits.hh"
42 #include "arch/riscv/utility.hh"
43
44 class ThreadContext;
45
46 namespace RiscvISA {
47
48 inline Addr
49 vtophys(Addr vaddr)
50 {
51 fatal("VTOPHYS: Unimplemented on RISC-V\n");
52 return vaddr;
53 }
54
55 inline Addr
56 vtophys(ThreadContext *tc, Addr vaddr)
57 {
58 fatal("VTOPHYS: Unimplemented on RISC-V\n");
59 return vtophys(vaddr);
60 }
61
62 } // namespace RiscvISA
63
64 #endif // __ARCH_RISCV_VTOPHYS_HH__
65