src/arch/sparc/asi.hh

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  */
  30
  31 #ifndef __ARCH_SPARC_ASI_HH__
  32 #define __ARCH_SPARC_ASI_HH__
  33
  34 namespace SparcISA
  35 {
  36     enum ASI {
  37         /* Priveleged ASIs */
  38         //0x00-0x03 implementation dependent
  39         ASI_NUCLEUS = 0x4,
  40         ASI_N = 0x4,
  41         //0x05-0x0B implementation dependent
  42         ASI_NL = 0xC,
  43         ASI_NUCLEUS_LITTLE = ASI_NL,
  44         //0x0D-0x0F implementation dependent
  45         ASI_AIUP = 0x10,
  46         ASI_AS_IF_USER_PRIMARY = ASI_AIUP,
  47         ASI_AIUS = 0x11,
  48         ASI_AS_IF_USER_SECONDARY = ASI_AIUS,
  49         //0x12-0x13 implementation dependent
  50         ASI_REAL = 0x14,
  51         ASI_REAL_IO = 0x15,
  52         ASI_BLK_AIUP = 0x16,
  53         ASI_BLOCK_AS_IF_USER_PRIMARY = ASI_BLK_AIUP,
  54         ASI_BLK_AIUS = 0x17,
  55         ASI_BLOCK_AS_IF_USER_SECONDARY = ASI_BLK_AIUS,
  56         ASI_AIUPL = 0x18,
  57         ASI_AS_IF_USER_PRIMARY_LITTLE = ASI_AIUPL,
  58         ASI_AIUSL = 0x19,
  59         ASI_AS_IF_USER_SECONDARY_LITTLE = ASI_AIUSL,
  60         //0x1A-0x1B implementation dependent
  61         ASI_REAL_L = 0x1C,
  62         ASI_REAL_LITTLE = ASI_REAL_L,
  63         ASI_REAL_IO_L = 0x1D,
  64         ASI_REAL_IO_LITTLE = ASI_REAL_IO_L,
  65         ASI_BLK_AIUPL = 0x1E,
  66         ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE = ASI_BLK_AIUPL,
  67         ASI_BLK_AIUSL = 0x1F,
  68         ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE = ASI_BLK_AIUSL,
  69         ASI_SCRATCHPAD = 0x20,
  70         ASI_MMU_CONTEXTID = 0x21,
  71         ASI_LDTX_AIUP = 0x22,
  72         ASI_LD_TWINX_AS_IF_USER_PRIMARY = ASI_LDTX_AIUP,
  73         ASI_LDTX_AIUS = 0x23,
  74         ASI_LD_TWINX_AS_IF_USER_SECONDARY = ASI_LDTX_AIUS,
  75         //0x24 implementation dependent
  76         ASI_QUEUE = 0x25,
  77         ASI_LDTX_REAL = 0x26,
  78         ASI_LD_TWINX_REAL = ASI_LDTX_REAL,
  79         ASI_LDTX_N = 0x27,
  80         ASI_LD_TWINX_NUCLEUS = ASI_LDTX_N,
  81         //0x28-0x29 implementation dependent
  82         ASI_LDTX_AIUPL = 0x2A,
  83         ASI_LD_TWINX_AS_IF_USER_PRIMARY_LITTLE = ASI_LDTX_AIUPL,
  84         ASI_LDTX_AIUSL = 0x2B,
  85         ASI_LD_TWINX_AS_IF_USER_SECONDARY_LITTLE = ASI_LDTX_AIUSL,
  86         //0x2C-0x2D implementation dependent
  87         ASI_LDTX_REAL_L = 0x2E,
  88         ASI_LD_TWINX_REAL_LITTLE = ASI_LDTX_REAL_L,
  89         ASI_LDTX_NL = 0x2F,
  90         ASI_LD_TWINX_NUCLEUS_LITTLE = ASI_LDTX_NL,
  91         //0x30-0x40 implementation dependent
  92         ASI_CMT_SHARED = 0x41,
  93         //0x42-0x4F implementation dependent
  94         ASI_HYP_SCRATCHPAD = 0x4F,
  95         ASI_IMMU = 0x50,
  96         ASI_MMU_REAL = 0x52,
  97         //0x53 implementation dependent
  98         ASI_MMU = 0x54,
  99         ASI_ITLB_DATA_ACCESS_REG = 0x55,
 100         ASI_ITLB_TAG_READ_REG = 0x56,
 101         ASI_IMMU_DEMAP = 0x57,
 102         ASI_DMMU = 0x58,
 103         ASI_UMMU = 0x58,
 104         //0x59-0x5B reserved
 105         ASI_DTLB_DATA_IN_REG = 0x5C,
 106         ASI_DTLB_DATA_ACCESS_REG = 0x5D,
 107         ASI_DTLB_TAG_READ_REG = 0x5E,
 108         ASI_DMMU_DEMAP = 0x5F,
 109         //0x60-62 implementation dependent
 110         ASI_CMT_PER_STRAND = 0x63,
 111         //0x64-0x67 implementation dependent
 112         //0x68-0x7F reserved
 113
 114         /* Unpriveleged ASIs */
 115         ASI_P = 0x80,
 116         ASI_PRIMARY = ASI_P,
 117         ASI_S = 0x81,
 118         ASI_SECONDARY = ASI_S,
 119         ASI_PNF = 0x82,
 120         ASI_PRIMARY_NO_FAULT = ASI_PNF,
 121         ASI_SNF = 0x83,
 122         ASI_SECONDARY_NO_FAULT = ASI_SNF,
 123         //0x84-0x87 reserved
 124         ASI_PL = 0x88,
 125         ASI_PRIMARY_LITTLE = ASI_PL,
 126         ASI_SL = 0x89,
 127         ASI_SECONDARY_LITTLE = ASI_SL,
 128         ASI_PNFL = 0x8A,
 129         ASI_PRIMARY_NO_FAULT_LITTLE = ASI_PNFL,
 130         ASI_SNFL = 0x8B,
 131         ASI_SECONDARY_NO_FAULT_LITTLE = ASI_SNFL,
 132         //0x8C-0xBF reserved
 133         ASI_PST8_P = 0xC0,
 134         ASI_PST8_PRIMARY = ASI_PST8_P,
 135         ASI_PST8_S = 0xC1,
 136         ASI_PST8_SECONDARY = ASI_PST8_S,
 137         ASI_PST16_P = 0xC2,
 138         ASI_PST16_PRIMARY = ASI_PST16_P,
 139         ASI_PST16_S = 0xC3,
 140         ASI_PST16_SECONDARY = ASI_PST16_S,
 141         ASI_PST32_P = 0xC4,
 142         ASI_PST32_PRIMARY = ASI_PST32_P,
 143         ASI_PST32_S = 0xC5,
 144         ASI_PST32_SECONDARY = ASI_PST32_S,
 145         //0xC6-0xC7 implementation dependent
 146         ASI_PST8_PL = 0xC8,
 147         ASI_PST8_PRIMARY_LITTLE = ASI_PST8_PL,
 148         ASI_PST8_SL = 0xC9,
 149         ASI_PST8_SECONDARY_LITTLE = ASI_PST8_SL,
 150         ASI_PST16_PL = 0xCA,
 151         ASI_PST16_PRIMARY_LITTLE = ASI_PST16_PL,
 152         ASI_PST16_SL = 0xCB,
 153         ASI_PST16_SECONDARY_LITTLE = ASI_PST16_SL,
 154         ASI_PST32_PL = 0xCC,
 155         ASI_PST32_PRIMARY_LITTLE = ASI_PST32_PL,
 156         ASI_PST32_SL = 0xCD,
 157         ASI_PST32_SECONDARY_LITTLE = ASI_PST32_SL,
 158         //0xCE-0xCF implementation dependent
 159         ASI_PL8_P = 0xD0,
 160         ASI_PL8_PRIMARY = ASI_PL8_P,
 161         ASI_PL8_S = 0xD1,
 162         ASI_PL8_SECONDARY = ASI_PL8_S,
 163         ASI_PL16_P = 0xD2,
 164         ASI_PL16_PRIMARY = ASI_PL16_P,
 165         ASI_PL16_S = 0xD3,
 166         ASI_PL16_SECONDARY = ASI_PL16_S,
 167         //0xD4-0xD7 implementation dependent
 168         ASI_PL8_PL = 0xD8,
 169         ASI_PL8_PRIMARY_LITTLE = ASI_PL8_PL,
 170         ASI_PL8_SL = 0xD9,
 171         ASI_PL8_SECONDARY_LITTLE = ASI_PL8_SL,
 172         ASI_PL16_PL = 0xDA,
 173         ASI_PL16_PRIMARY_LITTLE = ASI_PL16_PL,
 174         ASI_PL16_SL = 0xDB,
 175         ASI_PL16_SECONDARY_LITTLE = ASI_PL16_SL,
 176         //0xDC-0xDF implementation dependent
 177         //0xE0-0xE1 reserved
 178         ASI_LDTX_P = 0xE2,
 179         ASI_LD_TWINX_PRIMARY = ASI_LDTX_P,
 180         ASI_LDTX_S = 0xE3,
 181         ASI_LD_TWINX_SECONDARY = ASI_LDTX_S,
 182         //0xE4-0xE9 implementation dependent
 183         ASI_LDTX_PL = 0xEA,
 184         ASI_LD_TWINX_PRIMARY_LITTLE = ASI_LDTX_PL,
 185         ASI_LDTX_SL = 0xEB,
 186         ASI_LD_TWINX_SECONDARY_LITTLE = ASI_LDTX_SL,
 187         //0xEC-0xEF implementation dependent
 188         ASI_BLK_P = 0xF0,
 189         ASI_BLOCK_PRIMARY = ASI_BLK_P,
 190         ASI_BLK_S = 0xF1,
 191         ASI_BLOCK_SECONDARY = ASI_BLK_S,
 192         //0xF2-0xF7 implementation dependent
 193         ASI_BLK_PL = 0xF8,
 194         ASI_BLOCK_PRIMARY_LITTLE = ASI_BLK_PL,
 195         ASI_BLK_SL = 0xF9,
 196         ASI_BLOCK_SECONDARY_LITTLE = ASI_BLK_SL
 197         //0xFA-0xFF implementation dependent
 198     };
 199 };
 200
 201 #endif // __ARCH_SPARC_TLB_HH__