Change ExecContext to ThreadContext. This is being renamed to differentiate between...
[gem5.git] / src / arch / sparc / faults.cc
1 /*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Kevin Lim
30 */
31
32 #include "arch/sparc/faults.hh"
33 #include "cpu/thread_context.hh"
34 #include "cpu/base.hh"
35 #include "base/trace.hh"
36
37 namespace SparcISA
38 {
39
40 FaultName InternalProcessorError::_name = "intprocerr";
41 TrapType InternalProcessorError::_trapType = 0x029;
42 FaultPriority InternalProcessorError::_priority = 4;
43 FaultStat InternalProcessorError::_count;
44
45 FaultName MemAddressNotAligned::_name = "unalign";
46 TrapType MemAddressNotAligned::_trapType = 0x034;
47 FaultPriority MemAddressNotAligned::_priority = 10;
48 FaultStat MemAddressNotAligned::_count;
49
50 FaultName PowerOnReset::_name = "pow_reset";
51 TrapType PowerOnReset::_trapType = 0x001;
52 FaultPriority PowerOnReset::_priority = 0;
53 FaultStat PowerOnReset::_count;
54
55 FaultName WatchDogReset::_name = "watch_dog_reset";
56 TrapType WatchDogReset::_trapType = 0x002;
57 FaultPriority WatchDogReset::_priority = 1;
58 FaultStat WatchDogReset::_count;
59
60 FaultName ExternallyInitiatedReset::_name = "extern_reset";
61 TrapType ExternallyInitiatedReset::_trapType = 0x003;
62 FaultPriority ExternallyInitiatedReset::_priority = 1;
63 FaultStat ExternallyInitiatedReset::_count;
64
65 FaultName SoftwareInitiatedReset::_name = "software_reset";
66 TrapType SoftwareInitiatedReset::_trapType = 0x004;
67 FaultPriority SoftwareInitiatedReset::_priority = 1;
68 FaultStat SoftwareInitiatedReset::_count;
69
70 FaultName REDStateException::_name = "red_counte";
71 TrapType REDStateException::_trapType = 0x005;
72 FaultPriority REDStateException::_priority = 1;
73 FaultStat REDStateException::_count;
74
75 FaultName InstructionAccessException::_name = "inst_access";
76 TrapType InstructionAccessException::_trapType = 0x008;
77 FaultPriority InstructionAccessException::_priority = 5;
78 FaultStat InstructionAccessException::_count;
79
80 FaultName InstructionAccessMMUMiss::_name = "inst_mmu";
81 TrapType InstructionAccessMMUMiss::_trapType = 0x009;
82 FaultPriority InstructionAccessMMUMiss::_priority = 2;
83 FaultStat InstructionAccessMMUMiss::_count;
84
85 FaultName InstructionAccessError::_name = "inst_error";
86 TrapType InstructionAccessError::_trapType = 0x00A;
87 FaultPriority InstructionAccessError::_priority = 3;
88 FaultStat InstructionAccessError::_count;
89
90 FaultName IllegalInstruction::_name = "illegal_inst";
91 TrapType IllegalInstruction::_trapType = 0x010;
92 FaultPriority IllegalInstruction::_priority = 7;
93 FaultStat IllegalInstruction::_count;
94
95 FaultName PrivilegedOpcode::_name = "priv_opcode";
96 TrapType PrivilegedOpcode::_trapType = 0x011;
97 FaultPriority PrivilegedOpcode::_priority = 6;
98 FaultStat PrivilegedOpcode::_count;
99
100 FaultName UnimplementedLDD::_name = "unimp_ldd";
101 TrapType UnimplementedLDD::_trapType = 0x012;
102 FaultPriority UnimplementedLDD::_priority = 6;
103 FaultStat UnimplementedLDD::_count;
104
105 FaultName UnimplementedSTD::_name = "unimp_std";
106 TrapType UnimplementedSTD::_trapType = 0x013;
107 FaultPriority UnimplementedSTD::_priority = 6;
108 FaultStat UnimplementedSTD::_count;
109
110 FaultName FpDisabled::_name = "fp_disabled";
111 TrapType FpDisabled::_trapType = 0x020;
112 FaultPriority FpDisabled::_priority = 8;
113 FaultStat FpDisabled::_count;
114
115 FaultName FpExceptionIEEE754::_name = "fp_754";
116 TrapType FpExceptionIEEE754::_trapType = 0x021;
117 FaultPriority FpExceptionIEEE754::_priority = 11;
118 FaultStat FpExceptionIEEE754::_count;
119
120 FaultName FpExceptionOther::_name = "fp_other";
121 TrapType FpExceptionOther::_trapType = 0x022;
122 FaultPriority FpExceptionOther::_priority = 11;
123 FaultStat FpExceptionOther::_count;
124
125 FaultName TagOverflow::_name = "tag_overflow";
126 TrapType TagOverflow::_trapType = 0x023;
127 FaultPriority TagOverflow::_priority = 14;
128 FaultStat TagOverflow::_count;
129
130 FaultName DivisionByZero::_name = "div_by_zero";
131 TrapType DivisionByZero::_trapType = 0x028;
132 FaultPriority DivisionByZero::_priority = 15;
133 FaultStat DivisionByZero::_count;
134
135 FaultName DataAccessException::_name = "data_access";
136 TrapType DataAccessException::_trapType = 0x030;
137 FaultPriority DataAccessException::_priority = 12;
138 FaultStat DataAccessException::_count;
139
140 FaultName DataAccessMMUMiss::_name = "data_mmu";
141 TrapType DataAccessMMUMiss::_trapType = 0x031;
142 FaultPriority DataAccessMMUMiss::_priority = 12;
143 FaultStat DataAccessMMUMiss::_count;
144
145 FaultName DataAccessError::_name = "data_error";
146 TrapType DataAccessError::_trapType = 0x032;
147 FaultPriority DataAccessError::_priority = 12;
148 FaultStat DataAccessError::_count;
149
150 FaultName DataAccessProtection::_name = "data_protection";
151 TrapType DataAccessProtection::_trapType = 0x033;
152 FaultPriority DataAccessProtection::_priority = 12;
153 FaultStat DataAccessProtection::_count;
154
155 FaultName LDDFMemAddressNotAligned::_name = "unalign_lddf";
156 TrapType LDDFMemAddressNotAligned::_trapType = 0x035;
157 FaultPriority LDDFMemAddressNotAligned::_priority = 10;
158 FaultStat LDDFMemAddressNotAligned::_count;
159
160 FaultName STDFMemAddressNotAligned::_name = "unalign_stdf";
161 TrapType STDFMemAddressNotAligned::_trapType = 0x036;
162 FaultPriority STDFMemAddressNotAligned::_priority = 10;
163 FaultStat STDFMemAddressNotAligned::_count;
164
165 FaultName PrivilegedAction::_name = "priv_action";
166 TrapType PrivilegedAction::_trapType = 0x037;
167 FaultPriority PrivilegedAction::_priority = 11;
168 FaultStat PrivilegedAction::_count;
169
170 FaultName LDQFMemAddressNotAligned::_name = "unalign_ldqf";
171 TrapType LDQFMemAddressNotAligned::_trapType = 0x038;
172 FaultPriority LDQFMemAddressNotAligned::_priority = 10;
173 FaultStat LDQFMemAddressNotAligned::_count;
174
175 FaultName STQFMemAddressNotAligned::_name = "unalign_stqf";
176 TrapType STQFMemAddressNotAligned::_trapType = 0x039;
177 FaultPriority STQFMemAddressNotAligned::_priority = 10;
178 FaultStat STQFMemAddressNotAligned::_count;
179
180 FaultName AsyncDataError::_name = "async_data";
181 TrapType AsyncDataError::_trapType = 0x040;
182 FaultPriority AsyncDataError::_priority = 2;
183 FaultStat AsyncDataError::_count;
184
185 FaultName CleanWindow::_name = "clean_win";
186 TrapType CleanWindow::_trapType = 0x024;
187 FaultPriority CleanWindow::_priority = 10;
188 FaultStat CleanWindow::_count;
189
190 //The enumerated faults
191
192 FaultName InterruptLevelN::_name = "interrupt_n";
193 TrapType InterruptLevelN::_baseTrapType = 0x041;
194 FaultStat InterruptLevelN::_count;
195
196 FaultName SpillNNormal::_name = "spill_n_normal";
197 TrapType SpillNNormal::_baseTrapType = 0x080;
198 FaultPriority SpillNNormal::_priority = 9;
199 FaultStat SpillNNormal::_count;
200
201 FaultName SpillNOther::_name = "spill_n_other";
202 TrapType SpillNOther::_baseTrapType = 0x0A0;
203 FaultPriority SpillNOther::_priority = 9;
204 FaultStat SpillNOther::_count;
205
206 FaultName FillNNormal::_name = "fill_n_normal";
207 TrapType FillNNormal::_baseTrapType = 0x0C0;
208 FaultPriority FillNNormal::_priority = 9;
209 FaultStat FillNNormal::_count;
210
211 FaultName FillNOther::_name = "fill_n_other";
212 TrapType FillNOther::_baseTrapType = 0x0E0;
213 FaultPriority FillNOther::_priority = 9;
214 FaultStat FillNOther::_count;
215
216 FaultName TrapInstruction::_name = "trap_inst_n";
217 TrapType TrapInstruction::_baseTrapType = 0x100;
218 FaultPriority TrapInstruction::_priority = 16;
219 FaultStat TrapInstruction::_count;
220
221 #if FULL_SYSTEM
222
223 void SparcFault::invoke(ThreadContext * tc)
224 {
225 FaultBase::invoke(tc);
226 countStat()++;
227
228 //Use the SPARC trap state machine
229 /*// exception restart address
230 if (setRestartAddress() || !tc->inPalMode())
231 tc->setMiscReg(AlphaISA::IPR_EXC_ADDR, tc->regs.pc);
232
233 if (skipFaultingInstruction()) {
234 // traps... skip faulting instruction.
235 tc->setMiscReg(AlphaISA::IPR_EXC_ADDR,
236 tc->readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4);
237 }
238
239 if (!tc->inPalMode())
240 AlphaISA::swap_palshadow(&(tc->regs), true);
241
242 tc->regs.pc = tc->readMiscReg(AlphaISA::IPR_PAL_BASE) + vect();
243 tc->regs.npc = tc->regs.pc + sizeof(MachInst);*/
244 }
245
246 #endif
247
248 #if !FULL_SYSTEM
249
250 void TrapInstruction::invoke(ThreadContext * tc)
251 {
252 tc->syscall(syscall_num);
253 }
254
255 #endif
256
257 } // namespace SparcISA
258