arch: ISA parser additions of vector registers
[gem5.git] / src / arch / sparc / faults.hh
1 /*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Kevin Lim
30 */
31
32 #ifndef __SPARC_FAULTS_HH__
33 #define __SPARC_FAULTS_HH__
34
35 #include "cpu/static_inst.hh"
36 #include "sim/faults.hh"
37
38 // The design of the "name" and "vect" functions is in sim/faults.hh
39
40 namespace SparcISA
41 {
42
43 typedef uint32_t TrapType;
44 typedef uint32_t FaultPriority;
45
46 class ITB;
47
48 class SparcFaultBase : public FaultBase
49 {
50 public:
51 enum PrivilegeLevel
52 {
53 U, User = U,
54 P, Privileged = P,
55 H, Hyperprivileged = H,
56 NumLevels,
57 SH = -1,
58 ShouldntHappen = SH
59 };
60 struct FaultVals
61 {
62 const FaultName name;
63 const TrapType trapType;
64 const FaultPriority priority;
65 const PrivilegeLevel nextPrivilegeLevel[NumLevels];
66 FaultStat count;
67 };
68 void invoke(ThreadContext * tc, const StaticInstPtr &inst =
69 StaticInst::nullStaticInstPtr);
70 virtual TrapType trapType() = 0;
71 virtual FaultPriority priority() = 0;
72 virtual FaultStat & countStat() = 0;
73 virtual PrivilegeLevel getNextLevel(PrivilegeLevel current) = 0;
74 };
75
76 template<typename T>
77 class SparcFault : public SparcFaultBase
78 {
79 protected:
80 static FaultVals vals;
81 public:
82 FaultName name() const { return vals.name; }
83 TrapType trapType() { return vals.trapType; }
84 FaultPriority priority() { return vals.priority; }
85 FaultStat & countStat() { return vals.count; }
86
87 PrivilegeLevel
88 getNextLevel(PrivilegeLevel current)
89 {
90 return vals.nextPrivilegeLevel[current];
91 }
92 };
93
94 class PowerOnReset : public SparcFault<PowerOnReset>
95 {
96 void invoke(ThreadContext * tc, const StaticInstPtr &inst =
97 StaticInst::nullStaticInstPtr);
98 };
99
100 class WatchDogReset : public SparcFault<WatchDogReset> {};
101
102 class ExternallyInitiatedReset : public SparcFault<ExternallyInitiatedReset> {};
103
104 class SoftwareInitiatedReset : public SparcFault<SoftwareInitiatedReset> {};
105
106 class REDStateException : public SparcFault<REDStateException> {};
107
108 class StoreError : public SparcFault<StoreError> {};
109
110 class InstructionAccessException : public SparcFault<InstructionAccessException> {};
111
112 // class InstructionAccessMMUMiss : public SparcFault<InstructionAccessMMUMiss> {};
113
114 class InstructionAccessError : public SparcFault<InstructionAccessError> {};
115
116 class IllegalInstruction : public SparcFault<IllegalInstruction> {};
117
118 class PrivilegedOpcode : public SparcFault<PrivilegedOpcode> {};
119
120 // class UnimplementedLDD : public SparcFault<UnimplementedLDD> {};
121
122 // class UnimplementedSTD : public SparcFault<UnimplementedSTD> {};
123
124 class FpDisabled : public SparcFault<FpDisabled> {};
125 class VecDisabled : public SparcFault<VecDisabled> {};
126
127 class FpExceptionIEEE754 : public SparcFault<FpExceptionIEEE754> {};
128
129 class FpExceptionOther : public SparcFault<FpExceptionOther> {};
130
131 class TagOverflow : public SparcFault<TagOverflow> {};
132
133 class CleanWindow : public SparcFault<CleanWindow> {};
134
135 class DivisionByZero : public SparcFault<DivisionByZero> {};
136
137 class InternalProcessorError :
138 public SparcFault<InternalProcessorError> {};
139
140 class InstructionInvalidTSBEntry :
141 public SparcFault<InstructionInvalidTSBEntry> {};
142
143 class DataInvalidTSBEntry : public SparcFault<DataInvalidTSBEntry> {};
144
145 class DataAccessException : public SparcFault<DataAccessException> {};
146
147 // class DataAccessMMUMiss : public SparcFault<DataAccessMMUMiss> {};
148
149 class DataAccessError : public SparcFault<DataAccessError> {};
150
151 class DataAccessProtection : public SparcFault<DataAccessProtection> {};
152
153 class MemAddressNotAligned :
154 public SparcFault<MemAddressNotAligned> {};
155
156 class LDDFMemAddressNotAligned : public SparcFault<LDDFMemAddressNotAligned> {};
157
158 class STDFMemAddressNotAligned : public SparcFault<STDFMemAddressNotAligned> {};
159
160 class PrivilegedAction : public SparcFault<PrivilegedAction> {};
161
162 class LDQFMemAddressNotAligned : public SparcFault<LDQFMemAddressNotAligned> {};
163
164 class STQFMemAddressNotAligned : public SparcFault<STQFMemAddressNotAligned> {};
165
166 class InstructionRealTranslationMiss :
167 public SparcFault<InstructionRealTranslationMiss> {};
168
169 class DataRealTranslationMiss : public SparcFault<DataRealTranslationMiss> {};
170
171 // class AsyncDataError : public SparcFault<AsyncDataError> {};
172
173 template <class T>
174 class EnumeratedFault : public SparcFault<T>
175 {
176 protected:
177 uint32_t _n;
178 public:
179 EnumeratedFault(uint32_t n) : SparcFault<T>(), _n(n) {}
180 TrapType trapType() { return SparcFault<T>::trapType() + _n; }
181 };
182
183 class InterruptLevelN : public EnumeratedFault<InterruptLevelN>
184 {
185 public:
186 InterruptLevelN(uint32_t n) : EnumeratedFault<InterruptLevelN>(n) {;}
187 FaultPriority priority() { return 3200 - _n*100; }
188 };
189
190 class HstickMatch : public SparcFault<HstickMatch> {};
191
192 class TrapLevelZero : public SparcFault<TrapLevelZero> {};
193
194 class InterruptVector : public SparcFault<InterruptVector> {};
195
196 class PAWatchpoint : public SparcFault<PAWatchpoint> {};
197
198 class VAWatchpoint : public SparcFault<VAWatchpoint> {};
199
200 class FastInstructionAccessMMUMiss :
201 public SparcFault<FastInstructionAccessMMUMiss>
202 {
203 protected:
204 Addr vaddr;
205 public:
206 FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr)
207 {}
208 FastInstructionAccessMMUMiss() : vaddr(0)
209 {}
210 void invoke(ThreadContext * tc, const StaticInstPtr &inst =
211 StaticInst::nullStaticInstPtr);
212 };
213
214 class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
215 {
216 protected:
217 Addr vaddr;
218 public:
219 FastDataAccessMMUMiss(Addr addr) : vaddr(addr)
220 {}
221 FastDataAccessMMUMiss() : vaddr(0)
222 {}
223 void invoke(ThreadContext * tc, const StaticInstPtr &inst =
224 StaticInst::nullStaticInstPtr);
225 };
226
227 class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
228
229 class InstructionBreakpoint : public SparcFault<InstructionBreakpoint> {};
230
231 class CpuMondo : public SparcFault<CpuMondo> {};
232
233 class DevMondo : public SparcFault<DevMondo> {};
234
235 class ResumableError : public SparcFault<ResumableError> {};
236
237 class SpillNNormal : public EnumeratedFault<SpillNNormal>
238 {
239 public:
240 SpillNNormal(uint32_t n) : EnumeratedFault<SpillNNormal>(n) {;}
241 // These need to be handled specially to enable spill traps in SE
242 void invoke(ThreadContext * tc, const StaticInstPtr &inst =
243 StaticInst::nullStaticInstPtr);
244 };
245
246 class SpillNOther : public EnumeratedFault<SpillNOther>
247 {
248 public:
249 SpillNOther(uint32_t n) : EnumeratedFault<SpillNOther>(n)
250 {}
251 };
252
253 class FillNNormal : public EnumeratedFault<FillNNormal>
254 {
255 public:
256 FillNNormal(uint32_t n) : EnumeratedFault<FillNNormal>(n)
257 {}
258 // These need to be handled specially to enable fill traps in SE
259 void invoke(ThreadContext * tc, const StaticInstPtr &inst =
260 StaticInst::nullStaticInstPtr);
261 };
262
263 class FillNOther : public EnumeratedFault<FillNOther>
264 {
265 public:
266 FillNOther(uint32_t n) : EnumeratedFault<FillNOther>(n)
267 {}
268 };
269
270 class TrapInstruction : public EnumeratedFault<TrapInstruction>
271 {
272 public:
273 TrapInstruction(uint32_t n) : EnumeratedFault<TrapInstruction>(n)
274 {}
275 // In SE, trap instructions are requesting services from the OS.
276 void invoke(ThreadContext * tc, const StaticInstPtr &inst =
277 StaticInst::nullStaticInstPtr);
278 };
279
280 /*
281 * Explicitly declare template static member variables to avoid warnings
282 * in some clang versions
283 */
284 template<> SparcFaultBase::FaultVals SparcFault<PowerOnReset>::vals;
285 template<> SparcFaultBase::FaultVals SparcFault<WatchDogReset>::vals;
286 template<> SparcFaultBase::FaultVals
287 SparcFault<ExternallyInitiatedReset>::vals;
288 template<> SparcFaultBase::FaultVals SparcFault<SoftwareInitiatedReset>::vals;
289 template<> SparcFaultBase::FaultVals SparcFault<REDStateException>::vals;
290 template<> SparcFaultBase::FaultVals SparcFault<StoreError>::vals;
291 template<> SparcFaultBase::FaultVals
292 SparcFault<InstructionAccessException>::vals;
293 template<> SparcFaultBase::FaultVals SparcFault<InstructionAccessError>::vals;
294 template<> SparcFaultBase::FaultVals SparcFault<IllegalInstruction>::vals;
295 template<> SparcFaultBase::FaultVals SparcFault<PrivilegedOpcode>::vals;
296 template<> SparcFaultBase::FaultVals SparcFault<FpDisabled>::vals;
297 template<> SparcFaultBase::FaultVals SparcFault<FpExceptionIEEE754>::vals;
298 template<> SparcFaultBase::FaultVals SparcFault<FpExceptionOther>::vals;
299 template<> SparcFaultBase::FaultVals SparcFault<TagOverflow>::vals;
300 template<> SparcFaultBase::FaultVals SparcFault<CleanWindow>::vals;
301 template<> SparcFaultBase::FaultVals SparcFault<DivisionByZero>::vals;
302 template<> SparcFaultBase::FaultVals SparcFault<InternalProcessorError>::vals;
303 template<> SparcFaultBase::FaultVals
304 SparcFault<InstructionInvalidTSBEntry>::vals;
305 template<> SparcFaultBase::FaultVals SparcFault<DataInvalidTSBEntry>::vals;
306 template<> SparcFaultBase::FaultVals SparcFault<DataAccessException>::vals;
307 template<> SparcFaultBase::FaultVals SparcFault<DataAccessError>::vals;
308 template<> SparcFaultBase::FaultVals SparcFault<DataAccessProtection>::vals;
309 template<> SparcFaultBase::FaultVals SparcFault<MemAddressNotAligned>::vals;
310 template<> SparcFaultBase::FaultVals
311 SparcFault<LDDFMemAddressNotAligned>::vals;
312 template<> SparcFaultBase::FaultVals
313 SparcFault<STDFMemAddressNotAligned>::vals;
314 template<> SparcFaultBase::FaultVals SparcFault<PrivilegedAction>::vals;
315 template<> SparcFaultBase::FaultVals
316 SparcFault<LDQFMemAddressNotAligned>::vals;
317 template<> SparcFaultBase::FaultVals
318 SparcFault<STQFMemAddressNotAligned>::vals;
319 template<> SparcFaultBase::FaultVals
320 SparcFault<InstructionRealTranslationMiss>::vals;
321 template<> SparcFaultBase::FaultVals SparcFault<DataRealTranslationMiss>::vals;
322 template<> SparcFaultBase::FaultVals SparcFault<InterruptLevelN>::vals;
323 template<> SparcFaultBase::FaultVals SparcFault<HstickMatch>::vals;
324 template<> SparcFaultBase::FaultVals SparcFault<TrapLevelZero>::vals;
325 template<> SparcFaultBase::FaultVals SparcFault<InterruptVector>::vals;
326 template<> SparcFaultBase::FaultVals SparcFault<PAWatchpoint>::vals;
327 template<> SparcFaultBase::FaultVals SparcFault<VAWatchpoint>::vals;
328 template<> SparcFaultBase::FaultVals
329 SparcFault<FastInstructionAccessMMUMiss>::vals;
330 template<> SparcFaultBase::FaultVals SparcFault<FastDataAccessMMUMiss>::vals;
331 template<>
332 SparcFaultBase::FaultVals SparcFault<FastDataAccessProtection>::vals;
333 template<> SparcFaultBase::FaultVals SparcFault<InstructionBreakpoint>::vals;
334 template<> SparcFaultBase::FaultVals SparcFault<CpuMondo>::vals;
335 template<> SparcFaultBase::FaultVals SparcFault<DevMondo>::vals;
336 template<> SparcFaultBase::FaultVals SparcFault<ResumableError>::vals;
337 template<> SparcFaultBase::FaultVals SparcFault<SpillNNormal>::vals;
338 template<> SparcFaultBase::FaultVals SparcFault<SpillNOther>::vals;
339 template<> SparcFaultBase::FaultVals SparcFault<FillNNormal>::vals;
340 template<> SparcFaultBase::FaultVals SparcFault<FillNOther>::vals;
341 template<> SparcFaultBase::FaultVals SparcFault<TrapInstruction>::vals;
342
343
344 void enterREDState(ThreadContext *tc);
345
346 void doREDFault(ThreadContext *tc, TrapType tt);
347
348 void doNormalFault(ThreadContext *tc, TrapType tt, bool gotoHpriv);
349
350 void getREDVector(MiscReg TT, Addr &PC, Addr &NPC);
351
352 void getHyperVector(ThreadContext * tc, Addr &PC, Addr &NPC, MiscReg TT);
353
354 void getPrivVector(ThreadContext *tc, Addr &PC, Addr &NPC, MiscReg TT,
355 MiscReg TL);
356
357 } // namespace SparcISA
358
359 #endif // __SPARC_FAULTS_HH__