src/arch/sparc/faults.hh

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Kevin Lim
  30  */
  31
  32 #ifndef __SPARC_FAULTS_HH__
  33 #define __SPARC_FAULTS_HH__
  34
  35 #include "config/full_system.hh"
  36 #include "cpu/static_inst.hh"
  37 #include "sim/faults.hh"
  38
  39 // The design of the "name" and "vect" functions is in sim/faults.hh
  40
  41 namespace SparcISA
  42 {
  43
  44 typedef uint32_t TrapType;
  45 typedef uint32_t FaultPriority;
  46
  47 class ITB;
  48
  49 class SparcFaultBase : public FaultBase
  50 {
  51   public:
  52     enum PrivilegeLevel
  53     {
  54         U, User = U,
  55         P, Privileged = P,
  56         H, Hyperprivileged = H,
  57         NumLevels,
  58         SH = -1,
  59         ShouldntHappen = SH
  60     };
  61     struct FaultVals
  62     {
  63         const FaultName name;
  64         const TrapType trapType;
  65         const FaultPriority priority;
  66         const PrivilegeLevel nextPrivilegeLevel[NumLevels];
  67         FaultStat count;
  68     };
  69     void invoke(ThreadContext * tc,
  70             StaticInstPtr inst = StaticInst::nullStaticInstPtr);
  71     virtual TrapType trapType() = 0;
  72     virtual FaultPriority priority() = 0;
  73     virtual FaultStat & countStat() = 0;
  74     virtual PrivilegeLevel getNextLevel(PrivilegeLevel current) = 0;
  75 };
  76
  77 template<typename T>
  78 class SparcFault : public SparcFaultBase
  79 {
  80   protected:
  81     static FaultVals vals;
  82   public:
  83     FaultName name() const { return vals.name; }
  84     TrapType trapType() { return vals.trapType; }
  85     FaultPriority priority() { return vals.priority; }
  86     FaultStat & countStat() { return vals.count; }
  87
  88     PrivilegeLevel
  89     getNextLevel(PrivilegeLevel current)
  90     {
  91         return vals.nextPrivilegeLevel[current];
  92     }
  93 };
  94
  95 class PowerOnReset : public SparcFault<PowerOnReset>
  96 {
  97     void invoke(ThreadContext * tc,
  98             StaticInstPtr inst = StaticInst::nullStaticInstPtr);
  99 };
 100
 101 class WatchDogReset : public SparcFault<WatchDogReset> {};
 102
 103 class ExternallyInitiatedReset : public SparcFault<ExternallyInitiatedReset> {};
 104
 105 class SoftwareInitiatedReset : public SparcFault<SoftwareInitiatedReset> {};
 106
 107 class REDStateException : public SparcFault<REDStateException> {};
 108
 109 class StoreError : public SparcFault<StoreError> {};
 110
 111 class InstructionAccessException : public SparcFault<InstructionAccessException> {};
 112
 113 // class InstructionAccessMMUMiss : public SparcFault<InstructionAccessMMUMiss> {};
 114
 115 class InstructionAccessError : public SparcFault<InstructionAccessError> {};
 116
 117 class IllegalInstruction : public SparcFault<IllegalInstruction> {};
 118
 119 class PrivilegedOpcode : public SparcFault<PrivilegedOpcode> {};
 120
 121 // class UnimplementedLDD : public SparcFault<UnimplementedLDD> {};
 122
 123 // class UnimplementedSTD : public SparcFault<UnimplementedSTD> {};
 124
 125 class FpDisabled : public SparcFault<FpDisabled> {};
 126
 127 class FpExceptionIEEE754 : public SparcFault<FpExceptionIEEE754> {};
 128
 129 class FpExceptionOther : public SparcFault<FpExceptionOther> {};
 130
 131 class TagOverflow : public SparcFault<TagOverflow> {};
 132
 133 class CleanWindow : public SparcFault<CleanWindow> {};
 134
 135 class DivisionByZero : public SparcFault<DivisionByZero> {};
 136
 137 class InternalProcessorError :
 138     public SparcFault<InternalProcessorError> {};
 139
 140 class InstructionInvalidTSBEntry :
 141     public SparcFault<InstructionInvalidTSBEntry> {};
 142
 143 class DataInvalidTSBEntry : public SparcFault<DataInvalidTSBEntry> {};
 144
 145 class DataAccessException : public SparcFault<DataAccessException> {};
 146
 147 // class DataAccessMMUMiss : public SparcFault<DataAccessMMUMiss> {};
 148
 149 class DataAccessError : public SparcFault<DataAccessError> {};
 150
 151 class DataAccessProtection : public SparcFault<DataAccessProtection> {};
 152
 153 class MemAddressNotAligned :
 154     public SparcFault<MemAddressNotAligned> {};
 155
 156 class LDDFMemAddressNotAligned : public SparcFault<LDDFMemAddressNotAligned> {};
 157
 158 class STDFMemAddressNotAligned : public SparcFault<STDFMemAddressNotAligned> {};
 159
 160 class PrivilegedAction : public SparcFault<PrivilegedAction> {};
 161
 162 class LDQFMemAddressNotAligned : public SparcFault<LDQFMemAddressNotAligned> {};
 163
 164 class STQFMemAddressNotAligned : public SparcFault<STQFMemAddressNotAligned> {};
 165
 166 class InstructionRealTranslationMiss :
 167     public SparcFault<InstructionRealTranslationMiss> {};
 168
 169 class DataRealTranslationMiss : public SparcFault<DataRealTranslationMiss> {};
 170
 171 // class AsyncDataError : public SparcFault<AsyncDataError> {};
 172
 173 template <class T>
 174 class EnumeratedFault : public SparcFault<T>
 175 {
 176   protected:
 177     uint32_t _n;
 178   public:
 179     EnumeratedFault(uint32_t n) : SparcFault<T>(), _n(n) {}
 180     TrapType trapType() { return SparcFault<T>::trapType() + _n; }
 181 };
 182
 183 class InterruptLevelN : public EnumeratedFault<InterruptLevelN>
 184 {
 185   public:
 186     InterruptLevelN(uint32_t n) : EnumeratedFault<InterruptLevelN>(n) {;}
 187     FaultPriority priority() { return 3200 - _n*100; }
 188 };
 189
 190 class HstickMatch : public SparcFault<HstickMatch> {};
 191
 192 class TrapLevelZero : public SparcFault<TrapLevelZero> {};
 193
 194 class InterruptVector : public SparcFault<InterruptVector> {};
 195
 196 class PAWatchpoint : public SparcFault<PAWatchpoint> {};
 197
 198 class VAWatchpoint : public SparcFault<VAWatchpoint> {};
 199
 200 class FastInstructionAccessMMUMiss :
 201     public SparcFault<FastInstructionAccessMMUMiss>
 202 {
 203   protected:
 204     Addr vaddr;
 205   public:
 206     FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr)
 207     {}
 208     FastInstructionAccessMMUMiss() : vaddr(0)
 209     {}
 210     void invoke(ThreadContext * tc,
 211             StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 212 };
 213
 214 class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
 215 {
 216   protected:
 217     Addr vaddr;
 218   public:
 219     FastDataAccessMMUMiss(Addr addr) : vaddr(addr)
 220     {}
 221     FastDataAccessMMUMiss() : vaddr(0)
 222     {}
 223     void invoke(ThreadContext * tc,
 224             StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 225 };
 226
 227 class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
 228
 229 class InstructionBreakpoint : public SparcFault<InstructionBreakpoint> {};
 230
 231 class CpuMondo : public SparcFault<CpuMondo> {};
 232
 233 class DevMondo : public SparcFault<DevMondo> {};
 234
 235 class ResumableError : public SparcFault<ResumableError> {};
 236
 237 class SpillNNormal : public EnumeratedFault<SpillNNormal>
 238 {
 239   public:
 240     SpillNNormal(uint32_t n) : EnumeratedFault<SpillNNormal>(n) {;}
 241     // These need to be handled specially to enable spill traps in SE
 242     void invoke(ThreadContext * tc,
 243             StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 244 };
 245
 246 class SpillNOther : public EnumeratedFault<SpillNOther>
 247 {
 248   public:
 249     SpillNOther(uint32_t n) : EnumeratedFault<SpillNOther>(n)
 250     {}
 251 };
 252
 253 class FillNNormal : public EnumeratedFault<FillNNormal>
 254 {
 255   public:
 256     FillNNormal(uint32_t n) : EnumeratedFault<FillNNormal>(n)
 257     {}
 258     // These need to be handled specially to enable fill traps in SE
 259     void invoke(ThreadContext * tc,
 260             StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 261 };
 262
 263 class FillNOther : public EnumeratedFault<FillNOther>
 264 {
 265   public:
 266     FillNOther(uint32_t n) : EnumeratedFault<FillNOther>(n)
 267     {}
 268 };
 269
 270 class TrapInstruction : public EnumeratedFault<TrapInstruction>
 271 {
 272   public:
 273     TrapInstruction(uint32_t n) : EnumeratedFault<TrapInstruction>(n)
 274     {}
 275     // In SE, trap instructions are requesting services from the OS.
 276     void invoke(ThreadContext * tc,
 277             StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 278 };
 279
 280 } // namespace SparcISA
 281
 282 #endif // __SPARC_FAULTS_HH__