src/arch/sparc/floatregfile.cc

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Ali Saidi
  30  */
  31
  32 #include "arch/sparc/floatregfile.hh"
  33 #include "base/trace.hh"
  34 #include "sim/byteswap.hh"
  35 #include "sim/serialize.hh"
  36
  37 #include <string.h>
  38
  39 using namespace SparcISA;
  40 using namespace std;
  41
  42 class Checkpoint;
  43
  44 void FloatRegFile::clear()
  45 {
  46     memset(regSpace, 0, sizeof(regSpace));
  47 }
  48
  49 FloatReg FloatRegFile::readReg(int floatReg, int width)
  50 {
  51     //In each of these cases, we have to copy the value into a temporary
  52     //variable. This is because we may otherwise try to access an
  53     //unaligned portion of memory.
  54     FloatReg result;
  55     switch(width)
  56     {
  57       case SingleWidth:
  58         uint32_t result32;
  59         float32_t fresult32;
  60         memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
  61         result32 = htog(result32);
  62         memcpy(&fresult32, &result32, sizeof(result32));
  63         result = fresult32;
  64         DPRINTF(FloatRegs, "Read FP32 register %d = [%f]0x%x\n",
  65                 floatReg, result, result32);
  66         break;
  67       case DoubleWidth:
  68         uint64_t result64;
  69         float64_t fresult64;
  70         memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
  71         result64 = htog(result64);
  72         memcpy(&fresult64, &result64, sizeof(result64));
  73         result = fresult64;
  74         DPRINTF(FloatRegs, "Read FP64 register %d = [%f]0x%x\n",
  75                 floatReg, result, result64);
  76         break;
  77       case QuadWidth:
  78         panic("Quad width FP not implemented.");
  79         break;
  80       default:
  81         panic("Attempted to read a %d bit floating point register!", width);
  82     }
  83     return result;
  84 }
  85
  86 FloatRegBits FloatRegFile::readRegBits(int floatReg, int width)
  87 {
  88     //In each of these cases, we have to copy the value into a temporary
  89     //variable. This is because we may otherwise try to access an
  90     //unaligned portion of memory.
  91     FloatRegBits result;
  92     switch(width)
  93     {
  94       case SingleWidth:
  95         uint32_t result32;
  96         memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
  97         result = htog(result32);
  98         DPRINTF(FloatRegs, "Read FP32 bits register %d = 0x%x\n",
  99                 floatReg, result);
 100         break;
 101       case DoubleWidth:
 102         uint64_t result64;
 103         memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
 104         result = htog(result64);
 105         DPRINTF(FloatRegs, "Read FP64 bits register %d = 0x%x\n",
 106                 floatReg, result);
 107         break;
 108       case QuadWidth:
 109         panic("Quad width FP not implemented.");
 110         break;
 111       default:
 112         panic("Attempted to read a %d bit floating point register!", width);
 113     }
 114     return result;
 115 }
 116
 117 Fault FloatRegFile::setReg(int floatReg, const FloatReg &val, int width)
 118 {
 119     //In each of these cases, we have to copy the value into a temporary
 120     //variable. This is because we may otherwise try to access an
 121     //unaligned portion of memory.
 122
 123     uint32_t result32;
 124     uint64_t result64;
 125     float32_t fresult32;
 126     float64_t fresult64;
 127     switch(width)
 128     {
 129       case SingleWidth:
 130         fresult32 = val;
 131         memcpy(&result32, &fresult32, sizeof(result32));
 132         result32 = gtoh(result32);
 133         memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
 134         DPRINTF(FloatRegs, "Write FP64 register %d = 0x%x\n",
 135                 floatReg, result32);
 136         break;
 137       case DoubleWidth:
 138         fresult64 = val;
 139         memcpy(&result64, &fresult64, sizeof(result64));
 140         result64 = gtoh(result64);
 141         memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
 142         DPRINTF(FloatRegs, "Write FP64 register %d = 0x%x\n",
 143                 floatReg, result64);
 144         break;
 145       case QuadWidth:
 146         panic("Quad width FP not implemented.");
 147         break;
 148       default:
 149         panic("Attempted to read a %d bit floating point register!", width);
 150     }
 151     return NoFault;
 152 }
 153
 154 Fault FloatRegFile::setRegBits(int floatReg, const FloatRegBits &val, int width)
 155 {
 156     //In each of these cases, we have to copy the value into a temporary
 157     //variable. This is because we may otherwise try to access an
 158     //unaligned portion of memory.
 159     uint32_t result32;
 160     uint64_t result64;
 161     switch(width)
 162     {
 163       case SingleWidth:
 164         result32 = gtoh((uint32_t)val);
 165         memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
 166         DPRINTF(FloatRegs, "Write FP64 bits register %d = 0x%x\n",
 167                 floatReg, result32);
 168         break;
 169       case DoubleWidth:
 170         result64 = gtoh((uint64_t)val);
 171         memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
 172         DPRINTF(FloatRegs, "Write FP64 bits register %d = 0x%x\n",
 173                 floatReg, result64);
 174         break;
 175       case QuadWidth:
 176         panic("Quad width FP not implemented.");
 177         break;
 178       default:
 179         panic("Attempted to read a %d bit floating point register!", width);
 180     }
 181     return NoFault;
 182 }
 183
 184 void FloatRegFile::serialize(std::ostream &os)
 185 {
 186     uint8_t *float_reg = (uint8_t*)regSpace;
 187     SERIALIZE_ARRAY(float_reg,
 188             SingleWidth / 8 * NumFloatRegs);
 189 }
 190
 191 void FloatRegFile::unserialize(Checkpoint *cp, const std::string &section)
 192 {
 193     uint8_t *float_reg = (uint8_t*)regSpace;
 194     UNSERIALIZE_ARRAY(float_reg,
 195             SingleWidth / 8 * NumFloatRegs);
 196 }
 197