src/arch/sparc/floatregfile.cc

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Ali Saidi
  30  */
  31
  32 #include "arch/sparc/floatregfile.hh"
  33 #include "base/trace.hh"
  34 #include "sim/byteswap.hh"
  35 #include "sim/serialize.hh"
  36
  37 using namespace SparcISA;
  38 using namespace std;
  39
  40 class Checkpoint;
  41
  42 string SparcISA::getFloatRegName(RegIndex index)
  43 {
  44     static std::string floatRegName[NumFloatRegs] =
  45         {"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
  46          "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
  47          "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
  48          "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
  49          "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
  50          "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
  51          "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
  52          "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63"};
  53     return floatRegName[index];
  54 }
  55
  56 void FloatRegFile::clear()
  57 {
  58     bzero(regSpace, sizeof(regSpace));
  59 }
  60
  61 FloatReg FloatRegFile::readReg(int floatReg, int width)
  62 {
  63     //In each of these cases, we have to copy the value into a temporary
  64     //variable. This is because we may otherwise try to access an
  65     //unaligned portion of memory.
  66     FloatReg result;
  67     switch(width)
  68     {
  69       case SingleWidth:
  70         float32_t result32;
  71         memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
  72         result = htog(result32);
  73         break;
  74       case DoubleWidth:
  75         float64_t result64;
  76         memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
  77         result = htog(result64);
  78         break;
  79       case QuadWidth:
  80         float128_t result128;
  81         memcpy(&result128, regSpace + 4 * floatReg, sizeof(result128));
  82         result = htog(result128);
  83         break;
  84       default:
  85         panic("Attempted to read a %d bit floating point register!", width);
  86     }
  87     return result;
  88 }
  89
  90 FloatRegBits FloatRegFile::readRegBits(int floatReg, int width)
  91 {
  92     //In each of these cases, we have to copy the value into a temporary
  93     //variable. This is because we may otherwise try to access an
  94     //unaligned portion of memory.
  95     FloatRegBits result;
  96     switch(width)
  97     {
  98       case SingleWidth:
  99         uint32_t result32;
 100         memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
 101         result = htog(result32);
 102         break;
 103       case DoubleWidth:
 104         uint64_t result64;
 105         memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
 106         result = htog(result64);
 107         break;
 108       case QuadWidth:
 109         uint64_t result128;
 110         memcpy(&result128, regSpace + 4 * floatReg, sizeof(result128));
 111         result = htog(result128);
 112         break;
 113       default:
 114         panic("Attempted to read a %d bit floating point register!", width);
 115     }
 116     return result;
 117 }
 118
 119 Fault FloatRegFile::setReg(int floatReg, const FloatReg &val, int width)
 120 {
 121     //In each of these cases, we have to copy the value into a temporary
 122     //variable. This is because we may otherwise try to access an
 123     //unaligned portion of memory.
 124
 125     uint32_t result32;
 126     uint64_t result64;
 127     switch(width)
 128     {
 129       case SingleWidth:
 130         result32 = gtoh((uint32_t)val);
 131         memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
 132         break;
 133       case DoubleWidth:
 134         result64 = gtoh((uint64_t)val);
 135         memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
 136         break;
 137       case QuadWidth:
 138         panic("Quad width FP not implemented.");
 139         break;
 140       default:
 141         panic("Attempted to read a %d bit floating point register!", width);
 142     }
 143     return NoFault;
 144 }
 145
 146 Fault FloatRegFile::setRegBits(int floatReg, const FloatRegBits &val, int width)
 147 {
 148     //In each of these cases, we have to copy the value into a temporary
 149     //variable. This is because we may otherwise try to access an
 150     //unaligned portion of memory.
 151     uint32_t result32;
 152     uint64_t result64;
 153     switch(width)
 154     {
 155       case SingleWidth:
 156         result32 = gtoh((uint32_t)val);
 157         memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
 158         break;
 159       case DoubleWidth:
 160         result64 = gtoh((uint64_t)val);
 161         memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
 162         break;
 163       case QuadWidth:
 164         panic("Quad width FP not implemented.");
 165         break;
 166       default:
 167         panic("Attempted to read a %d bit floating point register!", width);
 168     }
 169     return NoFault;
 170 }
 171
 172 void FloatRegFile::serialize(std::ostream &os)
 173 {
 174     SERIALIZE_ARRAY((unsigned char *)regSpace,
 175             SingleWidth / 8 * NumFloatRegs);
 176 }
 177
 178 void FloatRegFile::unserialize(Checkpoint *cp, const std::string &section)
 179 {
 180     UNSERIALIZE_ARRAY((unsigned char *)regSpace,
 181             SingleWidth / 8 * NumFloatRegs);
 182 }
 183