fix mostly floating point related
[gem5.git] / src / arch / sparc / floatregfile.cc
1 /*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Ali Saidi
30 */
31
32 #include "arch/sparc/floatregfile.hh"
33 #include "base/trace.hh"
34 #include "sim/byteswap.hh"
35 #include "sim/serialize.hh"
36
37 #include <string.h>
38
39 using namespace SparcISA;
40 using namespace std;
41
42 class Checkpoint;
43
44 string SparcISA::getFloatRegName(RegIndex index)
45 {
46 static std::string floatRegName[NumFloatRegs] =
47 {"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
48 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
49 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
50 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
51 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
52 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
53 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
54 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63"};
55 return floatRegName[index];
56 }
57
58 void FloatRegFile::clear()
59 {
60 memset(regSpace, 0, sizeof(regSpace));
61 }
62
63 FloatReg FloatRegFile::readReg(int floatReg, int width)
64 {
65 //In each of these cases, we have to copy the value into a temporary
66 //variable. This is because we may otherwise try to access an
67 //unaligned portion of memory.
68 FloatReg result;
69 switch(width)
70 {
71 case SingleWidth:
72 uint32_t result32;
73 float32_t fresult32;
74 memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
75 result32 = htog(result32);
76 memcpy(&fresult32, &result32, sizeof(result32));
77 result = fresult32;
78 DPRINTF(Sparc, "Read FP32 register %d = [%f]0x%x\n", floatReg, result, result32);
79 break;
80 case DoubleWidth:
81 uint64_t result64;
82 float64_t fresult64;
83 memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
84 result64 = htog(result64);
85 memcpy(&fresult64, &result64, sizeof(result64));
86 result = fresult64;
87 DPRINTF(Sparc, "Read FP64 register %d = [%f]0x%x\n", floatReg, result, result64);
88 break;
89 case QuadWidth:
90 panic("Quad width FP not implemented.");
91 break;
92 default:
93 panic("Attempted to read a %d bit floating point register!", width);
94 }
95 return result;
96 }
97
98 FloatRegBits FloatRegFile::readRegBits(int floatReg, int width)
99 {
100 //In each of these cases, we have to copy the value into a temporary
101 //variable. This is because we may otherwise try to access an
102 //unaligned portion of memory.
103 FloatRegBits result;
104 switch(width)
105 {
106 case SingleWidth:
107 uint32_t result32;
108 memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
109 result = htog(result32);
110 DPRINTF(Sparc, "Read FP32 bits register %d = 0x%x\n", floatReg, result);
111 break;
112 case DoubleWidth:
113 uint64_t result64;
114 memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
115 result = htog(result64);
116 DPRINTF(Sparc, "Read FP64 bits register %d = 0x%x\n", floatReg, result);
117 break;
118 case QuadWidth:
119 panic("Quad width FP not implemented.");
120 break;
121 default:
122 panic("Attempted to read a %d bit floating point register!", width);
123 }
124 return result;
125 }
126
127 Fault FloatRegFile::setReg(int floatReg, const FloatReg &val, int width)
128 {
129 //In each of these cases, we have to copy the value into a temporary
130 //variable. This is because we may otherwise try to access an
131 //unaligned portion of memory.
132
133 uint32_t result32;
134 uint64_t result64;
135 float32_t fresult32;
136 float64_t fresult64;
137 switch(width)
138 {
139 case SingleWidth:
140 fresult32 = val;
141 memcpy(&result32, &fresult32, sizeof(result32));
142 result32 = gtoh(result32);
143 memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
144 DPRINTF(Sparc, "Write FP64 register %d = 0x%x\n", floatReg, result32);
145 break;
146 case DoubleWidth:
147 fresult64 = val;
148 memcpy(&result64, &fresult64, sizeof(result64));
149 result64 = gtoh(result64);
150 memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
151 DPRINTF(Sparc, "Write FP64 register %d = 0x%x\n", floatReg, result64);
152 break;
153 case QuadWidth:
154 panic("Quad width FP not implemented.");
155 break;
156 default:
157 panic("Attempted to read a %d bit floating point register!", width);
158 }
159 return NoFault;
160 }
161
162 Fault FloatRegFile::setRegBits(int floatReg, const FloatRegBits &val, int width)
163 {
164 //In each of these cases, we have to copy the value into a temporary
165 //variable. This is because we may otherwise try to access an
166 //unaligned portion of memory.
167 uint32_t result32;
168 uint64_t result64;
169 switch(width)
170 {
171 case SingleWidth:
172 result32 = gtoh((uint32_t)val);
173 memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
174 DPRINTF(Sparc, "Write FP64 bits register %d = 0x%x\n", floatReg, result32);
175 break;
176 case DoubleWidth:
177 result64 = gtoh((uint64_t)val);
178 memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
179 DPRINTF(Sparc, "Write FP64 bits register %d = 0x%x\n", floatReg, result64);
180 break;
181 case QuadWidth:
182 panic("Quad width FP not implemented.");
183 break;
184 default:
185 panic("Attempted to read a %d bit floating point register!", width);
186 }
187 return NoFault;
188 }
189
190 void FloatRegFile::serialize(std::ostream &os)
191 {
192 uint8_t *float_reg = (uint8_t*)regSpace;
193 SERIALIZE_ARRAY(float_reg,
194 SingleWidth / 8 * NumFloatRegs);
195 }
196
197 void FloatRegFile::unserialize(Checkpoint *cp, const std::string &section)
198 {
199 uint8_t *float_reg = (uint8_t*)regSpace;
200 UNSERIALIZE_ARRAY(float_reg,
201 SingleWidth / 8 * NumFloatRegs);
202 }
203