src/arch/sparc/floatregfile.cc

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Ali Saidi
  30  */
  31
  32 #include "arch/sparc/floatregfile.hh"
  33 #include "base/trace.hh"
  34 #include "sim/byteswap.hh"
  35 #include "sim/serialize.hh"
  36
  37 #include <string.h>
  38
  39 using namespace SparcISA;
  40 using namespace std;
  41
  42 class Checkpoint;
  43
  44 string SparcISA::getFloatRegName(RegIndex index)
  45 {
  46     static std::string floatRegName[NumFloatRegs] =
  47         {"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
  48          "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
  49          "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
  50          "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
  51          "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
  52          "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
  53          "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
  54          "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63"};
  55     return floatRegName[index];
  56 }
  57
  58 void FloatRegFile::clear()
  59 {
  60     memset(regSpace, 0, sizeof(regSpace));
  61 }
  62
  63 FloatReg FloatRegFile::readReg(int floatReg, int width)
  64 {
  65     //In each of these cases, we have to copy the value into a temporary
  66     //variable. This is because we may otherwise try to access an
  67     //unaligned portion of memory.
  68     FloatReg result;
  69     switch(width)
  70     {
  71       case SingleWidth:
  72         float32_t result32;
  73         memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
  74         result = htog(result32);
  75         DPRINTF(Sparc, "Read FP32 register %d = 0x%x\n", floatReg, result);
  76         break;
  77       case DoubleWidth:
  78         float64_t result64;
  79         memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
  80         result = htog(result64);
  81         DPRINTF(Sparc, "Read FP64 register %d = 0x%x\n", floatReg, result);
  82         break;
  83       case QuadWidth:
  84         float128_t result128;
  85         memcpy(&result128, regSpace + 4 * floatReg, sizeof(result128));
  86         result = htog(result128);
  87         DPRINTF(Sparc, "Read FP128 register %d = 0x%x\n", floatReg, result);
  88         break;
  89       default:
  90         panic("Attempted to read a %d bit floating point register!", width);
  91     }
  92     return result;
  93 }
  94
  95 FloatRegBits FloatRegFile::readRegBits(int floatReg, int width)
  96 {
  97     //In each of these cases, we have to copy the value into a temporary
  98     //variable. This is because we may otherwise try to access an
  99     //unaligned portion of memory.
 100     FloatRegBits result;
 101     switch(width)
 102     {
 103       case SingleWidth:
 104         uint32_t result32;
 105         memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
 106         result = htog(result32);
 107         DPRINTF(Sparc, "Read FP32 bits register %d = 0x%x\n", floatReg, result);
 108         break;
 109       case DoubleWidth:
 110         uint64_t result64;
 111         memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
 112         result = htog(result64);
 113         DPRINTF(Sparc, "Read FP64 bits register %d = 0x%x\n", floatReg, result);
 114         break;
 115       case QuadWidth:
 116         uint64_t result128;
 117         memcpy(&result128, regSpace + 4 * floatReg, sizeof(result128));
 118         result = htog(result128);
 119         DPRINTF(Sparc, "Read FP128 bits register %d = 0x%x\n", floatReg, result);
 120         break;
 121       default:
 122         panic("Attempted to read a %d bit floating point register!", width);
 123     }
 124     return result;
 125 }
 126
 127 Fault FloatRegFile::setReg(int floatReg, const FloatReg &val, int width)
 128 {
 129     //In each of these cases, we have to copy the value into a temporary
 130     //variable. This is because we may otherwise try to access an
 131     //unaligned portion of memory.
 132
 133     uint32_t result32;
 134     uint64_t result64;
 135     switch(width)
 136     {
 137       case SingleWidth:
 138         result32 = gtoh((uint32_t)val);
 139         memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
 140         DPRINTF(Sparc, "Write FP64 register %d = 0x%x\n", floatReg, result32);
 141         break;
 142       case DoubleWidth:
 143         result64 = gtoh((uint64_t)val);
 144         memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
 145         DPRINTF(Sparc, "Write FP64 register %d = 0x%x\n", floatReg, result64);
 146         break;
 147       case QuadWidth:
 148         panic("Quad width FP not implemented.");
 149         break;
 150       default:
 151         panic("Attempted to read a %d bit floating point register!", width);
 152     }
 153     return NoFault;
 154 }
 155
 156 Fault FloatRegFile::setRegBits(int floatReg, const FloatRegBits &val, int width)
 157 {
 158     //In each of these cases, we have to copy the value into a temporary
 159     //variable. This is because we may otherwise try to access an
 160     //unaligned portion of memory.
 161     uint32_t result32;
 162     uint64_t result64;
 163     switch(width)
 164     {
 165       case SingleWidth:
 166         result32 = gtoh((uint32_t)val);
 167         memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
 168         DPRINTF(Sparc, "Write FP64 bits register %d = 0x%x\n", floatReg, result32);
 169         break;
 170       case DoubleWidth:
 171         result64 = gtoh((uint64_t)val);
 172         memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
 173         DPRINTF(Sparc, "Write FP64 bits register %d = 0x%x\n", floatReg, result64);
 174         break;
 175       case QuadWidth:
 176         panic("Quad width FP not implemented.");
 177         break;
 178       default:
 179         panic("Attempted to read a %d bit floating point register!", width);
 180     }
 181     return NoFault;
 182 }
 183
 184 void FloatRegFile::serialize(std::ostream &os)
 185 {
 186     uint8_t *float_reg = (uint8_t*)regSpace;
 187     SERIALIZE_ARRAY(float_reg,
 188             SingleWidth / 8 * NumFloatRegs);
 189 }
 190
 191 void FloatRegFile::unserialize(Checkpoint *cp, const std::string &section)
 192 {
 193     uint8_t *float_reg = (uint8_t*)regSpace;
 194     UNSERIALIZE_ARRAY(float_reg,
 195             SingleWidth / 8 * NumFloatRegs);
 196 }
 197