Merge ktlim@zizzer:/bk/newmem
[gem5.git] / src / arch / sparc / handlers.hh
1 /*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31 #ifndef __ARCH_SPARC_HANDLERS_HH__
32 #define __ARCH_SPARC_HANDLERS_HH__
33
34 #include "arch/sparc/isa_traits.hh"
35 #include "arch/sparc/types.hh"
36 #include "sim/byteswap.hh"
37
38 namespace SparcISA {
39
40 //We only use 19 instructions for the trap handlers, but there would be
41 //space for 32 in a real SPARC trap table.
42 const int numFillInsts = 32;
43 const int numSpillInsts = 32;
44
45 const MachInst fillHandler64[numFillInsts] =
46 {
47 htog(0x87802018), //wr %g0, ASI_AIUP, %asi
48 htog(0xe0dba7ff), //ldxa [%sp + BIAS + (0*8)] %asi, %l0
49 htog(0xe2dba807), //ldxa [%sp + BIAS + (1*8)] %asi, %l1
50 htog(0xe4dba80f), //ldxa [%sp + BIAS + (2*8)] %asi, %l2
51 htog(0xe6dba817), //ldxa [%sp + BIAS + (3*8)] %asi, %l3
52 htog(0xe8dba81f), //ldxa [%sp + BIAS + (4*8)] %asi, %l4
53 htog(0xeadba827), //ldxa [%sp + BIAS + (5*8)] %asi, %l5
54 htog(0xecdba82f), //ldxa [%sp + BIAS + (6*8)] %asi, %l6
55 htog(0xeedba837), //ldxa [%sp + BIAS + (7*8)] %asi, %l7
56 htog(0xf0dba83f), //ldxa [%sp + BIAS + (8*8)] %asi, %i0
57 htog(0xf2dba847), //ldxa [%sp + BIAS + (9*8)] %asi, %i1
58 htog(0xf4dba84f), //ldxa [%sp + BIAS + (10*8)] %asi, %i2
59 htog(0xf6dba857), //ldxa [%sp + BIAS + (11*8)] %asi, %i3
60 htog(0xf8dba85f), //ldxa [%sp + BIAS + (12*8)] %asi, %i4
61 htog(0xfadba867), //ldxa [%sp + BIAS + (13*8)] %asi, %i5
62 htog(0xfcdba86f), //ldxa [%sp + BIAS + (14*8)] %asi, %i6
63 htog(0xfedba877), //ldxa [%sp + BIAS + (15*8)] %asi, %i7
64 htog(0x83880000), //restored
65 htog(0x83F00000), //retry
66 htog(0x00000000), //illtrap
67 htog(0x00000000), //illtrap
68 htog(0x00000000), //illtrap
69 htog(0x00000000), //illtrap
70 htog(0x00000000), //illtrap
71 htog(0x00000000), //illtrap
72 htog(0x00000000), //illtrap
73 htog(0x00000000), //illtrap
74 htog(0x00000000), //illtrap
75 htog(0x00000000), //illtrap
76 htog(0x00000000), //illtrap
77 htog(0x00000000), //illtrap
78 htog(0x00000000) //illtrap
79 };
80
81 const MachInst fillHandler32[numFillInsts] =
82 {
83 htog(0x87802018), //wr %g0, ASI_AIUP, %asi
84 htog(0xe083a000), //lduwa [%sp + (0*4)] %asi, %l0
85 htog(0xe283a004), //lduwa [%sp + (1*4)] %asi, %l1
86 htog(0xe483a008), //lduwa [%sp + (2*4)] %asi, %l2
87 htog(0xe683a00c), //lduwa [%sp + (3*4)] %asi, %l3
88 htog(0xe883a010), //lduwa [%sp + (4*4)] %asi, %l4
89 htog(0xea83a014), //lduwa [%sp + (5*4)] %asi, %l5
90 htog(0xec83a018), //lduwa [%sp + (6*4)] %asi, %l6
91 htog(0xee83a01c), //lduwa [%sp + (7*4)] %asi, %l7
92 htog(0xf083a020), //lduwa [%sp + (8*4)] %asi, %i0
93 htog(0xf283a024), //lduwa [%sp + (9*4)] %asi, %i1
94 htog(0xf483a028), //lduwa [%sp + (10*4)] %asi, %i2
95 htog(0xf683a02c), //lduwa [%sp + (11*4)] %asi, %i3
96 htog(0xf883a030), //lduwa [%sp + (12*4)] %asi, %i4
97 htog(0xfa83a034), //lduwa [%sp + (13*4)] %asi, %i5
98 htog(0xfc83a038), //lduwa [%sp + (14*4)] %asi, %i6
99 htog(0xfe83a03c), //lduwa [%sp + (15*4)] %asi, %i7
100 htog(0x83880000), //restored
101 htog(0x83F00000), //retry
102 htog(0x00000000), //illtrap
103 htog(0x00000000), //illtrap
104 htog(0x00000000), //illtrap
105 htog(0x00000000), //illtrap
106 htog(0x00000000), //illtrap
107 htog(0x00000000), //illtrap
108 htog(0x00000000), //illtrap
109 htog(0x00000000), //illtrap
110 htog(0x00000000), //illtrap
111 htog(0x00000000), //illtrap
112 htog(0x00000000), //illtrap
113 htog(0x00000000), //illtrap
114 htog(0x00000000) //illtrap
115 };
116
117 const MachInst spillHandler64[numSpillInsts] =
118 {
119 htog(0x87802018), //wr %g0, ASI_AIUP, %asi
120 htog(0xe0f3a7ff), //stxa %l0, [%sp + BIAS + (0*8)] %asi
121 htog(0xe2f3a807), //stxa %l1, [%sp + BIAS + (1*8)] %asi
122 htog(0xe4f3a80f), //stxa %l2, [%sp + BIAS + (2*8)] %asi
123 htog(0xe6f3a817), //stxa %l3, [%sp + BIAS + (3*8)] %asi
124 htog(0xe8f3a81f), //stxa %l4, [%sp + BIAS + (4*8)] %asi
125 htog(0xeaf3a827), //stxa %l5, [%sp + BIAS + (5*8)] %asi
126 htog(0xecf3a82f), //stxa %l6, [%sp + BIAS + (6*8)] %asi
127 htog(0xeef3a837), //stxa %l7, [%sp + BIAS + (7*8)] %asi
128 htog(0xf0f3a83f), //stxa %i0, [%sp + BIAS + (8*8)] %asi
129 htog(0xf2f3a847), //stxa %i1, [%sp + BIAS + (9*8)] %asi
130 htog(0xf4f3a84f), //stxa %i2, [%sp + BIAS + (10*8)] %asi
131 htog(0xf6f3a857), //stxa %i3, [%sp + BIAS + (11*8)] %asi
132 htog(0xf8f3a85f), //stxa %i4, [%sp + BIAS + (12*8)] %asi
133 htog(0xfaf3a867), //stxa %i5, [%sp + BIAS + (13*8)] %asi
134 htog(0xfcf3a86f), //stxa %i6, [%sp + BIAS + (14*8)] %asi
135 htog(0xfef3a877), //stxa %i7, [%sp + BIAS + (15*8)] %asi
136 htog(0x81880000), //saved
137 htog(0x83F00000), //retry
138 htog(0x00000000), //illtrap
139 htog(0x00000000), //illtrap
140 htog(0x00000000), //illtrap
141 htog(0x00000000), //illtrap
142 htog(0x00000000), //illtrap
143 htog(0x00000000), //illtrap
144 htog(0x00000000), //illtrap
145 htog(0x00000000), //illtrap
146 htog(0x00000000), //illtrap
147 htog(0x00000000), //illtrap
148 htog(0x00000000), //illtrap
149 htog(0x00000000), //illtrap
150 htog(0x00000000) //illtrap
151 };
152
153 const MachInst spillHandler32[numSpillInsts] =
154 {
155 htog(0x87802018), //wr %g0, ASI_AIUP, %asi
156 htog(0xe0a3a000), //stwa %l0, [%sp + (0*4)] %asi
157 htog(0xe2a3a004), //stwa %l1, [%sp + (1*4)] %asi
158 htog(0xe4a3a008), //stwa %l2, [%sp + (2*4)] %asi
159 htog(0xe6a3a00c), //stwa %l3, [%sp + (3*4)] %asi
160 htog(0xe8a3a010), //stwa %l4, [%sp + (4*4)] %asi
161 htog(0xeaa3a014), //stwa %l5, [%sp + (5*4)] %asi
162 htog(0xeca3a018), //stwa %l6, [%sp + (6*4)] %asi
163 htog(0xeea3a01c), //stwa %l7, [%sp + (7*4)] %asi
164 htog(0xf0a3a020), //stwa %i0, [%sp + (8*4)] %asi
165 htog(0xf2a3a024), //stwa %i1, [%sp + (9*4)] %asi
166 htog(0xf4a3a028), //stwa %i2, [%sp + (10*4)] %asi
167 htog(0xf6a3a02c), //stwa %i3, [%sp + (11*4)] %asi
168 htog(0xf8a3a030), //stwa %i4, [%sp + (12*4)] %asi
169 htog(0xfaa3a034), //stwa %i5, [%sp + (13*4)] %asi
170 htog(0xfca3a038), //stwa %i6, [%sp + (14*4)] %asi
171 htog(0xfea3a03c), //stwa %i7, [%sp + (15*4)] %asi
172 htog(0x81880000), //saved
173 htog(0x83F00000), //retry
174 htog(0x00000000), //illtrap
175 htog(0x00000000), //illtrap
176 htog(0x00000000), //illtrap
177 htog(0x00000000), //illtrap
178 htog(0x00000000), //illtrap
179 htog(0x00000000), //illtrap
180 htog(0x00000000), //illtrap
181 htog(0x00000000), //illtrap
182 htog(0x00000000), //illtrap
183 htog(0x00000000), //illtrap
184 htog(0x00000000), //illtrap
185 htog(0x00000000), //illtrap
186 htog(0x00000000) //illtrap
187 };
188
189 } // namespace SparcISA
190 #endif // __ARCH_SPARC_HANDLERS_HH__