arch,cpu: Enforce using accessors to get at src/destRegIdx.
[gem5.git] / src / arch / sparc / insts / blockmem.cc
1 /*
2 * Copyright (c) 2006-2007 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include "arch/sparc/insts/blockmem.hh"
30
31 namespace SparcISA
32 {
33
34 std::string
35 BlockMemMicro::generateDisassembly(
36 Addr pc, const Loader::SymbolTable *symtab) const
37 {
38 std::stringstream response;
39 bool load = flags[IsLoad];
40 bool save = flags[IsStore];
41
42 printMnemonic(response, mnemonic);
43 if (save) {
44 printReg(response, srcRegIdx(0));
45 ccprintf(response, ", ");
46 }
47 ccprintf(response, "[ ");
48 printReg(response, srcRegIdx(!save ? 0 : 1));
49 ccprintf(response, " + ");
50 printReg(response, srcRegIdx(!save ? 1 : 2));
51 ccprintf(response, " ]");
52 if (load) {
53 ccprintf(response, ", ");
54 printReg(response, destRegIdx(0));
55 }
56
57 return response.str();
58 }
59
60 std::string
61 BlockMemImmMicro::generateDisassembly(
62 Addr pc, const Loader::SymbolTable *symtab) const
63 {
64 std::stringstream response;
65 bool load = flags[IsLoad];
66 bool save = flags[IsStore];
67
68 printMnemonic(response, mnemonic);
69 if (save) {
70 printReg(response, srcRegIdx(1));
71 ccprintf(response, ", ");
72 }
73 ccprintf(response, "[ ");
74 printReg(response, srcRegIdx(0));
75 if (imm >= 0)
76 ccprintf(response, " + 0x%x ]", imm);
77 else
78 ccprintf(response, " + -0x%x ]", -imm);
79 if (load) {
80 ccprintf(response, ", ");
81 printReg(response, destRegIdx(0));
82 }
83
84 return response.str();
85 }
86
87 }