src/arch/sparc/isa/formats/mem/blockmem.isa

   1 // Copyright (c) 2006 The Regents of The University of Michigan
   2 // All rights reserved.
   3 //
   4 // Redistribution and use in source and binary forms, with or without
   5 // modification, are permitted provided that the following conditions are
   6 // met: redistributions of source code must retain the above copyright
   7 // notice, this list of conditions and the following disclaimer;
   8 // redistributions in binary form must reproduce the above copyright
   9 // notice, this list of conditions and the following disclaimer in the
  10 // documentation and/or other materials provided with the distribution;
  11 // neither the name of the copyright holders nor the names of its
  12 // contributors may be used to endorse or promote products derived from
  13 // this software without specific prior written permission.
  14 //
  15 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  16 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  17 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  18 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  19 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  20 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  21 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  22 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  23 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26 //
  27 // Authors: Ali Saidi
  28 //          Gabe Black
  29
  30 ////////////////////////////////////////////////////////////////////
  31 //
  32 // Block Memory instructions
  33 //
  34
  35 output header {{
  36
  37         class BlockMem : public SparcMacroInst
  38         {
  39           protected:
  40
  41             // Constructor
  42             // We make the assumption that all block memory operations
  43             // Will take 8 instructions to execute
  44             BlockMem(const char *mnem, ExtMachInst _machInst) :
  45                 SparcMacroInst(mnem, _machInst, No_OpClass, 8)
  46             {}
  47         };
  48
  49         class BlockMemImm : public BlockMem
  50         {
  51           protected:
  52
  53             // Constructor
  54             BlockMemImm(const char *mnem, ExtMachInst _machInst) :
  55                 BlockMem(mnem, _machInst)
  56             {}
  57         };
  58
  59         class BlockMemMicro : public SparcMicroInst
  60         {
  61           protected:
  62
  63             // Constructor
  64             BlockMemMicro(const char *mnem, ExtMachInst _machInst,
  65                     OpClass __opClass, int8_t _offset) :
  66                 SparcMicroInst(mnem, _machInst, __opClass),
  67                 offset(_offset)
  68             {}
  69
  70             std::string generateDisassembly(Addr pc,
  71                 const SymbolTable *symtab) const;
  72
  73             const int8_t offset;
  74         };
  75
  76         class BlockMemImmMicro : public BlockMemMicro
  77         {
  78           protected:
  79
  80             // Constructor
  81             BlockMemImmMicro(const char *mnem, ExtMachInst _machInst,
  82                     OpClass __opClass, int8_t _offset) :
  83                 BlockMemMicro(mnem, _machInst, __opClass, _offset),
  84                 imm(sext<13>(SIMM13))
  85             {}
  86
  87             std::string generateDisassembly(Addr pc,
  88                 const SymbolTable *symtab) const;
  89
  90             const int32_t imm;
  91         };
  92 }};
  93
  94 output decoder {{
  95         std::string BlockMemMicro::generateDisassembly(Addr pc,
  96                 const SymbolTable *symtab) const
  97         {
  98             std::stringstream response;
  99             bool load = flags[IsLoad];
 100             bool save = flags[IsStore];
 101
 102             printMnemonic(response, mnemonic);
 103             if(save)
 104             {
 105                 printReg(response, _srcRegIdx[0]);
 106                 ccprintf(response, ", ");
 107             }
 108             ccprintf(response, "[ ");
 109             printReg(response, _srcRegIdx[!save ? 0 : 1]);
 110             ccprintf(response, " + ");
 111             printReg(response, _srcRegIdx[!save ? 1 : 2]);
 112             ccprintf(response, " ]");
 113             if(load)
 114             {
 115                 ccprintf(response, ", ");
 116                 printReg(response, _destRegIdx[0]);
 117             }
 118
 119             return response.str();
 120         }
 121
 122         std::string BlockMemImmMicro::generateDisassembly(Addr pc,
 123                 const SymbolTable *symtab) const
 124         {
 125             std::stringstream response;
 126             bool load = flags[IsLoad];
 127             bool save = flags[IsStore];
 128
 129             printMnemonic(response, mnemonic);
 130             if(save)
 131             {
 132                 printReg(response, _srcRegIdx[1]);
 133                 ccprintf(response, ", ");
 134             }
 135             ccprintf(response, "[ ");
 136             printReg(response, _srcRegIdx[0]);
 137             if(imm >= 0)
 138                 ccprintf(response, " + 0x%x ]", imm);
 139             else
 140                 ccprintf(response, " + -0x%x ]", -imm);
 141             if(load)
 142             {
 143                 ccprintf(response, ", ");
 144                 printReg(response, _destRegIdx[0]);
 145             }
 146
 147             return response.str();
 148         }
 149
 150 }};
 151
 152 def template BlockMemDeclare {{
 153         /**
 154          * Static instruction class for a block memory operation
 155          */
 156         class %(class_name)s : public %(base_class)s
 157         {
 158           public:
 159             //Constructor
 160             %(class_name)s(ExtMachInst machInst);
 161
 162           protected:
 163             class %(class_name)s_0 : public %(base_class)sMicro
 164             {
 165               public:
 166                 //Constructor
 167                 %(class_name)s_0(ExtMachInst machInst);
 168                 %(BasicExecDeclare)s
 169                 %(InitiateAccDeclare)s
 170                 %(CompleteAccDeclare)s
 171             };
 172
 173             class %(class_name)s_1 : public %(base_class)sMicro
 174             {
 175               public:
 176                 //Constructor
 177                 %(class_name)s_1(ExtMachInst machInst);
 178                 %(BasicExecDeclare)s
 179                 %(InitiateAccDeclare)s
 180                 %(CompleteAccDeclare)s
 181             };
 182
 183             class %(class_name)s_2 : public %(base_class)sMicro
 184             {
 185               public:
 186                 //Constructor
 187                 %(class_name)s_2(ExtMachInst machInst);
 188                 %(BasicExecDeclare)s
 189                 %(InitiateAccDeclare)s
 190                 %(CompleteAccDeclare)s
 191             };
 192
 193             class %(class_name)s_3 : public %(base_class)sMicro
 194             {
 195               public:
 196                 //Constructor
 197                 %(class_name)s_3(ExtMachInst machInst);
 198                 %(BasicExecDeclare)s
 199                 %(InitiateAccDeclare)s
 200                 %(CompleteAccDeclare)s
 201             };
 202
 203             class %(class_name)s_4 : public %(base_class)sMicro
 204             {
 205               public:
 206                 //Constructor
 207                 %(class_name)s_4(ExtMachInst machInst);
 208                 %(BasicExecDeclare)s
 209                 %(InitiateAccDeclare)s
 210                 %(CompleteAccDeclare)s
 211             };
 212
 213             class %(class_name)s_5 : public %(base_class)sMicro
 214             {
 215               public:
 216                 //Constructor
 217                 %(class_name)s_5(ExtMachInst machInst);
 218                 %(BasicExecDeclare)s
 219                 %(InitiateAccDeclare)s
 220                 %(CompleteAccDeclare)s
 221             };
 222
 223             class %(class_name)s_6 : public %(base_class)sMicro
 224             {
 225               public:
 226                 //Constructor
 227                 %(class_name)s_6(ExtMachInst machInst);
 228                 %(BasicExecDeclare)s
 229                 %(InitiateAccDeclare)s
 230                 %(CompleteAccDeclare)s
 231             };
 232
 233             class %(class_name)s_7 : public %(base_class)sMicro
 234             {
 235               public:
 236                 //Constructor
 237                 %(class_name)s_7(ExtMachInst machInst);
 238                 %(BasicExecDeclare)s
 239                 %(InitiateAccDeclare)s
 240                 %(CompleteAccDeclare)s
 241             };
 242         };
 243 }};
 244
 245 // Basic instruction class constructor template.
 246 def template BlockMemConstructor {{
 247         inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
 248             : %(base_class)s("%(mnemonic)s", machInst)
 249         {
 250             %(constructor)s;
 251             microOps[0] = new %(class_name)s_0(machInst);
 252             microOps[1] = new %(class_name)s_1(machInst);
 253             microOps[2] = new %(class_name)s_2(machInst);
 254             microOps[3] = new %(class_name)s_3(machInst);
 255             microOps[4] = new %(class_name)s_4(machInst);
 256             microOps[5] = new %(class_name)s_5(machInst);
 257             microOps[6] = new %(class_name)s_6(machInst);
 258             microOps[7] = new %(class_name)s_7(machInst);
 259         }
 260 }};
 261
 262 def template BlockMemMicroConstructor {{
 263         inline %(class_name)s::
 264             %(class_name)s_%(micro_pc)s::
 265             %(class_name)s_%(micro_pc)s(ExtMachInst machInst) :
 266                 %(base_class)sMicro("%(mnemonic)s[%(micro_pc)s]",
 267                         machInst, %(op_class)s, %(micro_pc)s * 8)
 268     {
 269         %(constructor)s;
 270         %(set_flags)s;
 271     }
 272 }};
 273
 274 let {{
 275
 276     def doBlockMemFormat(code, faultCode, execute, name, Name, asi, opt_flags):
 277         # XXX Need to take care of pstate.hpriv as well. The lower ASIs
 278         # are split into ones that are available in priv and hpriv, and
 279         # those that are only available in hpriv
 280         addrCalcReg = 'EA = Rs1 + Rs2 + offset;'
 281         addrCalcImm = 'EA = Rs1 + imm + offset;'
 282         iop = InstObjParams(name, Name, 'BlockMem', code, opt_flags)
 283         iop_imm = InstObjParams(name, Name + 'Imm', 'BlockMemImm', code, opt_flags)
 284         header_output = BlockMemDeclare.subst(iop) + BlockMemDeclare.subst(iop_imm)
 285         decoder_output = BlockMemConstructor.subst(iop) + BlockMemConstructor.subst(iop_imm)
 286         decode_block = ROrImmDecode.subst(iop)
 287         matcher = re.compile(r'Frd_N')
 288         exec_output = ''
 289         for microPc in range(8):
 290             flag_code = ''
 291             if (microPc == 7):
 292                 flag_code = "flags[IsLastMicroOp] = true;"
 293             else:
 294                 flag_code = "flags[IsDelayedCommit] = true;"
 295             pcedCode = matcher.sub("Frd_%d" % microPc, code)
 296             iop = InstObjParams(name, Name, 'BlockMem', pcedCode,
 297                     opt_flags, {"ea_code": addrCalcReg,
 298                     "fault_check": faultCode, "micro_pc": microPc,
 299                     "set_flags": flag_code})
 300             iop_imm = InstObjParams(name, Name + 'Imm', 'BlockMemImm', pcedCode,
 301                     opt_flags, {"ea_code": addrCalcImm,
 302                     "fault_check": faultCode, "micro_pc": microPc,
 303                     "set_flags": flag_code})
 304             decoder_output += BlockMemMicroConstructor.subst(iop)
 305             decoder_output += BlockMemMicroConstructor.subst(iop_imm)
 306             exec_output += doDualSplitExecute(
 307                     pcedCode, addrCalcReg, addrCalcImm, execute, faultCode,
 308                     makeMicroName(name, microPc),
 309                     makeMicroName(name + "Imm", microPc),
 310                     makeMicroName(Name, microPc),
 311                     makeMicroName(Name + "Imm", microPc),
 312                     asi, opt_flags);
 313             faultCode = ''
 314         return (header_output, decoder_output, exec_output, decode_block)
 315 }};
 316
 317 def format BlockLoad(code, asi, *opt_flags) {{
 318         # We need to make sure to check the highest priority fault last.
 319         # That way, if other faults have been detected, they'll be overwritten
 320         # rather than the other way around.
 321         faultCode = AlternateASIPrivFaultCheck + BlockAlignmentFaultCheck
 322         (header_output,
 323          decoder_output,
 324          exec_output,
 325          decode_block) = doBlockMemFormat(code, faultCode,
 326              LoadExecute, name, Name, asi, opt_flags)
 327 }};
 328
 329 def format BlockStore(code, asi, *opt_flags) {{
 330         # We need to make sure to check the highest priority fault last.
 331         # That way, if other faults have been detected, they'll be overwritten
 332         # rather than the other way around.
 333         faultCode = AlternateASIPrivFaultCheck + BlockAlignmentFaultCheck
 334         (header_output,
 335          decoder_output,
 336          exec_output,
 337          decode_block) = doBlockMemFormat(code, faultCode,
 338              StoreExecute, name, Name, asi, opt_flags)
 339 }};