1 // Copyright (c) 2006-2007 The Regents of The University of Michigan
2 // All rights reserved.
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5 // modification, are permitted provided that the following conditions are
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31 ////////////////////////////////////////////////////////////////////
33 // Mem utility templates and functions
38 * Base class for memory operations.
40 class Mem : public SparcStaticInst
45 Mem(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
46 SparcStaticInst(mnem, _machInst, __opClass)
50 std::string generateDisassembly(Addr pc,
51 const SymbolTable *symtab) const;
55 * Class for memory operations which use an immediate offset.
57 class MemImm : public Mem
62 MemImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
63 Mem(mnem, _machInst, __opClass), imm(sext<13>(SIMM13))
66 std::string generateDisassembly(Addr pc,
67 const SymbolTable *symtab) const;
74 std::string Mem::generateDisassembly(Addr pc,
75 const SymbolTable *symtab) const
77 std::stringstream response;
78 bool load = flags[IsLoad];
79 bool store = flags[IsStore];
81 printMnemonic(response, mnemonic);
84 printReg(response, _srcRegIdx[0]);
85 ccprintf(response, ", ");
87 ccprintf(response, "[");
88 if(_srcRegIdx[!store ? 0 : 1] != 0)
90 printSrcReg(response, !store ? 0 : 1);
91 ccprintf(response, " + ");
93 printSrcReg(response, !store ? 1 : 2);
94 ccprintf(response, "]");
97 ccprintf(response, ", ");
98 printReg(response, _destRegIdx[0]);
101 return response.str();
104 std::string MemImm::generateDisassembly(Addr pc,
105 const SymbolTable *symtab) const
107 std::stringstream response;
108 bool load = flags[IsLoad];
109 bool save = flags[IsStore];
111 printMnemonic(response, mnemonic);
114 printReg(response, _srcRegIdx[0]);
115 ccprintf(response, ", ");
117 ccprintf(response, "[");
118 if(_srcRegIdx[!save ? 0 : 1] != 0)
120 printReg(response, _srcRegIdx[!save ? 0 : 1]);
121 ccprintf(response, " + ");
124 ccprintf(response, "0x%x]", imm);
126 ccprintf(response, "-0x%x]", -imm);
129 ccprintf(response, ", ");
130 printReg(response, _destRegIdx[0]);
133 return response.str();
137 //This template provides the execute functions for a load
138 def template LoadExecute {{
139 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
140 Trace::InstRecord *traceData) const
142 Fault fault = NoFault;
147 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
151 fault = xc->read(EA, (uint%(mem_acc_size)s_t&)Mem, %(asi_val)s);
159 //Write the resulting state to the execution context
167 def template LoadInitiateAcc {{
168 Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
169 Trace::InstRecord * traceData) const
171 Fault fault = NoFault;
176 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
180 fault = xc->read(EA, (uint%(mem_acc_size)s_t&)Mem, %(asi_val)s);
186 def template LoadCompleteAcc {{
187 Fault %(class_name)s::completeAcc(PacketPtr pkt, %(CPU_exec_context)s * xc,
188 Trace::InstRecord * traceData) const
190 Fault fault = NoFault;
193 Mem = pkt->get<typeof(Mem)>();
203 //This template provides the execute functions for a store
204 def template StoreExecute {{
205 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
206 Trace::InstRecord *traceData) const
208 Fault fault = NoFault;
209 //This is to support the conditional store in cas instructions.
210 //It should be optomized out in all the others
211 bool storeCond = true;
216 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
222 if(storeCond && fault == NoFault)
224 fault = xc->write((uint%(mem_acc_size)s_t)Mem,
229 //Write the resulting state to the execution context
237 def template StoreInitiateAcc {{
238 Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
239 Trace::InstRecord * traceData) const
241 Fault fault = NoFault;
242 bool storeCond = true;
247 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
253 if(storeCond && fault == NoFault)
255 fault = xc->write((uint%(mem_acc_size)s_t)Mem,
260 //Write the resulting state to the execution context
267 def template StoreCompleteAcc {{
268 Fault %(class_name)s::completeAcc(PacketPtr, %(CPU_exec_context)s * xc,
269 Trace::InstRecord * traceData) const
275 //This delcares the initiateAcc function in memory operations
276 def template InitiateAccDeclare {{
277 Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
280 //This declares the completeAcc function in memory operations
281 def template CompleteAccDeclare {{
282 Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const;
285 //Here are some code snippets which check for various fault conditions
287 LoadFuncs = [LoadExecute, LoadInitiateAcc, LoadCompleteAcc]
288 StoreFuncs = [StoreExecute, StoreInitiateAcc, StoreCompleteAcc]
289 # The LSB can be zero, since it's really the MSB in doubles and quads
290 # and we're dealing with doubles
291 BlockAlignmentFaultCheck = '''
293 fault = new IllegalInstruction;
295 fault = new MemAddressNotAligned;
297 TwinAlignmentFaultCheck = '''
299 fault = new IllegalInstruction;
301 fault = new MemAddressNotAligned;
303 # XXX Need to take care of pstate.hpriv as well. The lower ASIs
304 # are split into ones that are available in priv and hpriv, and
305 # those that are only available in hpriv
306 AlternateASIPrivFaultCheck = '''
307 if(!bits(Pstate,2,2) && !bits(Hpstate,2,2) && !AsiIsUnPriv((ASI)EXT_ASI) ||
308 !bits(Hpstate,2,2) && AsiIsHPriv((ASI)EXT_ASI))
309 fault = new PrivilegedAction;
310 else if(AsiIsAsIfUser((ASI)EXT_ASI) && !bits(Pstate,2,2))
311 fault = new PrivilegedAction;
316 //A simple function to generate the name of the macro op of a certain
317 //instruction at a certain micropc
319 def makeMicroName(name, microPc):
320 return name + "::" + name + "_" + str(microPc)
323 //This function properly generates the execute functions for one of the
324 //templates above. This is needed because in one case, ea computation,
325 //fault checks and the actual code all occur in the same function,
326 //and in the other they're distributed across two. Also note that for
327 //execute functions, the name of the base class doesn't matter.
329 def doSplitExecute(execute, name, Name, asi, opt_flags, microParam):
330 microParam["asi_val"] = asi;
331 iop = InstObjParams(name, Name, '', microParam, opt_flags)
332 (execf, initf, compf) = execute
333 return execf.subst(iop) + initf.subst(iop) + compf.subst(iop)
336 def doDualSplitExecute(code, eaRegCode, eaImmCode, execute,
337 faultCode, nameReg, nameImm, NameReg, NameImm, asi, opt_flags):
339 for (eaCode, name, Name) in (
340 (eaRegCode, nameReg, NameReg),
341 (eaImmCode, nameImm, NameImm)):
342 microParams = {"code": code, "ea_code": eaCode,
343 "fault_check": faultCode}
344 executeCode += doSplitExecute(execute, name, Name,
345 asi, opt_flags, microParams)