bda7d5192adb9c5adc1d0aac7753c167b06bbdf7
[gem5.git] / src / arch / sparc / isa / formats / trap.isa
1 // Copyright (c) 2006-2007 The Regents of The University of Michigan
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are
6 // met: redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer;
8 // redistributions in binary form must reproduce the above copyright
9 // notice, this list of conditions and the following disclaimer in the
10 // documentation and/or other materials provided with the distribution;
11 // neither the name of the copyright holders nor the names of its
12 // contributors may be used to endorse or promote products derived from
13 // this software without specific prior written permission.
14 //
15 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 //
27 // Authors: Gabe Black
28 // Steve Reinhardt
29
30 ////////////////////////////////////////////////////////////////////
31 //
32 // Trap instructions
33 //
34
35 output header {{
36 /**
37 * Base class for trap instructions,
38 * or instructions that always fault.
39 */
40 class Trap : public SparcStaticInst
41 {
42 protected:
43
44 // Constructor
45 Trap(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
46 SparcStaticInst(mnem, _machInst, __opClass), trapNum(SW_TRAP)
47 {
48 }
49
50 std::string generateDisassembly(Addr pc,
51 const SymbolTable *symtab) const;
52
53 int trapNum;
54 };
55 }};
56
57 output decoder {{
58 std::string
59 Trap::generateDisassembly(Addr pc, const SymbolTable *symtab) const
60 {
61 std::stringstream response;
62
63 printMnemonic(response, mnemonic);
64 ccprintf(response, " ");
65 printReg(response, _srcRegIdx[0]);
66 ccprintf(response, ", 0x%x", trapNum);
67 ccprintf(response, ", or ");
68 printReg(response, _srcRegIdx[1]);
69 return response.str();
70 }
71 }};
72
73 def template TrapExecute {{
74 Fault
75 %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
76 Trace::InstRecord *traceData) const
77 {
78 Fault fault = NoFault;
79 %(op_decl)s;
80 %(op_rd)s;
81 %(code)s
82 return fault;
83 }
84 }};
85
86 def template FpUnimplExecute {{
87 Fault
88 %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
89 Trace::InstRecord *traceData) const
90 {
91 Fault fault = NoFault;
92 %(op_decl)s;
93 %(op_rd)s;
94 %(code)s
95 %(op_wb)s;
96 return fault;
97 }
98 }};
99
100 def format Trap(code, *opt_flags) {{
101 iop = InstObjParams(name, Name, 'Trap', code, opt_flags)
102 header_output = BasicDeclare.subst(iop)
103 decoder_output = BasicConstructor.subst(iop)
104 decode_block = BasicDecode.subst(iop)
105 exec_output = TrapExecute.subst(iop)
106 }};
107
108 output header {{
109 class FpUnimpl : public SparcStaticInst
110 {
111 protected:
112 FpUnimpl(const char *mnem,
113 ExtMachInst _machInst, OpClass __opClass)
114 : SparcStaticInst(mnem, _machInst, __opClass)
115 {
116 }
117
118 std::string
119 generateDisassembly(Addr pc, const SymbolTable *symtab) const
120 {
121 return mnemonic;
122 }
123 };
124 }};
125
126 def format FpUnimpl(*flags) {{
127 fpunimpl_code = '''
128 Fsr = insertBits(Fsr, 16, 14, 3);
129 fault = new FpExceptionOther;
130 '''
131 iop = InstObjParams(name, Name, 'FpUnimpl', fpunimpl_code, flags)
132 header_output = BasicDeclare.subst(iop)
133 decoder_output = BasicConstructor.subst(iop)
134 decode_block = BasicDecode.subst(iop)
135 exec_output = FpUnimplExecute.subst(iop)
136 }};