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[gem5.git] / src / arch / sparc / isa / includes.isa
1 // Copyright (c) 2006-2007 The Regents of The University of Michigan
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are
6 // met: redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer;
8 // redistributions in binary form must reproduce the above copyright
9 // notice, this list of conditions and the following disclaimer in the
10 // documentation and/or other materials provided with the distribution;
11 // neither the name of the copyright holders nor the names of its
12 // contributors may be used to endorse or promote products derived from
13 // this software without specific prior written permission.
14 //
15 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 //
27 // Authors: Ali Saidi
28 // Gabe Black
29 // Steve Reinhardt
30
31 ////////////////////////////////////////////////////////////////////
32 //
33 // Output include file directives.
34 //
35
36 output header {{
37 #include <cstring>
38 #include <iostream>
39 #include <sstream>
40
41 #include "arch/sparc/faults.hh"
42 #include "arch/sparc/isa_traits.hh"
43 #include "arch/sparc/registers.hh"
44 #include "base/condcodes.hh"
45 #include "base/misc.hh"
46 #include "cpu/static_inst.hh"
47 #include "mem/packet.hh"
48 #include "mem/request.hh" // some constructors use MemReq flags
49 }};
50
51 output decoder {{
52 #include <algorithm>
53
54 #include "base/loader/symtab.hh"
55 #include "base/cprintf.hh"
56 #include "base/fenv.hh"
57 #include "cpu/thread_context.hh" // for Jump::branchTarget()
58 #include "mem/packet.hh"
59
60 using namespace SparcISA;
61 }};
62
63 output exec {{
64 #include "base/fenv.hh"
65
66 #if FULL_SYSTEM
67 #include "sim/pseudo_inst.hh"
68 #endif
69
70 #include <cmath>
71 #include <limits>
72
73 #include "arch/sparc/asi.hh"
74 #include "base/bigint.hh"
75 #include "cpu/base.hh"
76 #include "cpu/exetrace.hh"
77 #include "mem/packet.hh"
78 #include "mem/packet_access.hh"
79 #include "sim/sim_exit.hh"
80
81 using namespace SparcISA;
82 using namespace std;
83 }};
84