src/arch/sparc/isa_traits.hh

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Ali Saidi
  30  */
  31
  32 #ifndef __ARCH_SPARC_ISA_TRAITS_HH__
  33 #define __ARCH_SPARC_ISA_TRAITS_HH__
  34
  35 #include "arch/sparc/types.hh"
  36 #include "arch/sparc/max_inst_regs.hh"
  37 #include "arch/sparc/sparc_traits.hh"
  38 #include "config/full_system.hh"
  39 #include "base/types.hh"
  40
  41 class StaticInstPtr;
  42
  43 namespace BigEndianGuest {}
  44
  45 namespace SparcISA
  46 {
  47     class RegFile;
  48
  49     const int MachineBytes = 8;
  50
  51     //This makes sure the big endian versions of certain functions are used.
  52     using namespace BigEndianGuest;
  53     using SparcISAInst::MaxInstSrcRegs;
  54     using SparcISAInst::MaxInstDestRegs;
  55
  56     // SPARC has a delay slot
  57     #define ISA_HAS_DELAY_SLOT 1
  58
  59     // SPARC NOP (sethi %(hi(0), g0)
  60     const MachInst NoopMachInst = 0x01000000;
  61
  62     // These enumerate all the registers for dependence tracking.
  63     enum DependenceTags {
  64         FP_Base_DepTag = 32*3+9,
  65         Ctrl_Base_DepTag = FP_Base_DepTag + 64
  66     };
  67
  68     // semantically meaningful register indices
  69     const int ZeroReg = 0;      // architecturally meaningful
  70     // the rest of these depend on the ABI
  71     const int ReturnAddressReg = 31; // post call, precall is 15
  72     const int ReturnValueReg = 8;  // Post return, 24 is pre-return.
  73     const int StackPointerReg = 14;
  74     const int FramePointerReg = 30;
  75
  76     // Some OS syscall use a second register (o1) to return a second value
  77     const int SyscallPseudoReturnReg = 9;
  78
  79     //8K. This value is implmentation specific; and should probably
  80     //be somewhere else.
  81     const int LogVMPageSize = 13;
  82     const int VMPageSize = (1 << LogVMPageSize);
  83
  84     // real address virtual mapping
  85     // sort of like alpha super page, but less frequently used
  86     const Addr SegKPMEnd  = ULL(0xfffffffc00000000);
  87     const Addr SegKPMBase = ULL(0xfffffac000000000);
  88
  89     //Why does both the previous set of constants and this one exist?
  90     const int PageShift = 13;
  91     const int PageBytes = 1ULL << PageShift;
  92
  93     const int BranchPredAddrShiftAmt = 2;
  94
  95     StaticInstPtr decodeInst(ExtMachInst);
  96
  97     /////////// TLB Stuff ////////////
  98     const Addr StartVAddrHole = ULL(0x0000800000000000);
  99     const Addr EndVAddrHole = ULL(0xFFFF7FFFFFFFFFFF);
 100     const Addr VAddrAMask = ULL(0xFFFFFFFF);
 101     const Addr PAddrImplMask = ULL(0x000000FFFFFFFFFF);
 102     const Addr BytesInPageMask = ULL(0x1FFF);
 103
 104 #if FULL_SYSTEM
 105     // I don't know what it's for, so I don't
 106     // know what SPARC's value should be
 107     // For loading... XXX This maybe could be USegEnd?? --ali
 108     const Addr LoadAddrMask = ULL(0xffffffffff);
 109
 110     enum InterruptTypes
 111     {
 112         IT_TRAP_LEVEL_ZERO,
 113         IT_HINTP,
 114         IT_INT_VEC,
 115         IT_CPU_MONDO,
 116         IT_DEV_MONDO,
 117         IT_RES_ERROR,
 118         IT_SOFT_INT,
 119         NumInterruptTypes
 120     };
 121
 122 #endif
 123 }
 124
 125 #endif // __ARCH_SPARC_ISA_TRAITS_HH__