src/arch/sparc/isa_traits.hh

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Ali Saidi
  30  */
  31
  32 #ifndef __ARCH_SPARC_ISA_TRAITS_HH__
  33 #define __ARCH_SPARC_ISA_TRAITS_HH__
  34
  35 #include "arch/sparc/sparc_traits.hh"
  36 #include "arch/sparc/types.hh"
  37 #include "base/types.hh"
  38 #include "cpu/static_inst_fwd.hh"
  39
  40 namespace BigEndianGuest {}
  41
  42 namespace SparcISA
  43 {
  44 // This makes sure the big endian versions of certain functions are used.
  45 using namespace BigEndianGuest;
  46
  47 // SPARC has a delay slot
  48 #define ISA_HAS_DELAY_SLOT 1
  49
  50 // SPARC NOP (sethi %(hi(0), g0)
  51 const MachInst NoopMachInst = 0x01000000;
  52
  53 // real address virtual mapping
  54 // sort of like alpha super page, but less frequently used
  55 const Addr SegKPMEnd  = ULL(0xfffffffc00000000);
  56 const Addr SegKPMBase = ULL(0xfffffac000000000);
  57
  58 const Addr PageShift = 13;
  59 const Addr PageBytes = ULL(1) << PageShift;
  60
  61 StaticInstPtr decodeInst(ExtMachInst);
  62
  63 /////////// TLB Stuff ////////////
  64 const Addr StartVAddrHole = ULL(0x0000800000000000);
  65 const Addr EndVAddrHole = ULL(0xFFFF7FFFFFFFFFFF);
  66 const Addr VAddrAMask = ULL(0xFFFFFFFF);
  67 const Addr PAddrImplMask = ULL(0x000000FFFFFFFFFF);
  68 const Addr BytesInPageMask = ULL(0x1FFF);
  69
  70 enum InterruptTypes
  71 {
  72     IT_TRAP_LEVEL_ZERO,
  73     IT_HINTP,
  74     IT_INT_VEC,
  75     IT_CPU_MONDO,
  76     IT_DEV_MONDO,
  77     IT_RES_ERROR,
  78     IT_SOFT_INT,
  79     NumInterruptTypes
  80 };
  81
  82 // Memory accesses cannot be unaligned
  83 const bool HasUnalignedMemAcc = false;
  84
  85 const bool CurThreadInfoImplemented = false;
  86 const int CurThreadInfoReg = -1;
  87
  88 }
  89
  90 #endif // __ARCH_SPARC_ISA_TRAITS_HH__