2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 #include "arch/sparc/asi.hh"
33 #include "arch/sparc/handlers.hh"
34 #include "arch/sparc/isa_traits.hh"
35 #include "arch/sparc/process.hh"
36 #include "arch/sparc/types.hh"
37 #include "base/loader/object_file.hh"
38 #include "base/loader/elf_object.hh"
39 #include "base/misc.hh"
40 #include "cpu/thread_context.hh"
41 #include "mem/page_table.hh"
42 #include "sim/process_impl.hh"
43 #include "mem/translating_port.hh"
44 #include "sim/system.hh"
47 using namespace SparcISA
;
49 static const int FirstArgumentReg
= 8;
52 SparcLiveProcess::SparcLiveProcess(LiveProcessParams
* params
,
53 ObjectFile
*objFile
, Addr _StackBias
)
54 : LiveProcess(params
, objFile
), StackBias(_StackBias
)
57 // XXX all the below need to be updated for SPARC - Ali
58 brk_point
= objFile
->dataBase() + objFile
->dataSize() + objFile
->bssSize();
59 brk_point
= roundUp(brk_point
, VMPageSize
);
61 // Set pointer for next thread stack. Reserve 8M for main stack.
62 next_thread_stack_base
= stack_base
- (8 * 1024 * 1024);
64 //Initialize these to 0s
69 void SparcLiveProcess::handleTrap(int trapNum
, ThreadContext
*tc
)
73 case 0x01: //Software breakpoint
74 warn("Software breakpoint encountered at pc %#x.\n", tc
->readPC());
76 case 0x02: //Division by zero
77 warn("Software signaled a division by zero at pc %#x.\n",
80 case 0x03: //Flush window trap
83 case 0x04: //Clean windows
84 warn("Ignoring process request for clean register "
85 "windows at pc %#x.\n", tc
->readPC());
87 case 0x05: //Range check
88 warn("Software signaled a range check at pc %#x.\n",
91 case 0x06: //Fix alignment
92 warn("Ignoring process request for os assisted unaligned accesses "
93 "at pc %#x.\n", tc
->readPC());
95 case 0x07: //Integer overflow
96 warn("Software signaled an integer overflow at pc %#x.\n",
99 case 0x32: //Get integer condition codes
100 warn("Ignoring process request to get the integer condition codes "
101 "at pc %#x.\n", tc
->readPC());
103 case 0x33: //Set integer condition codes
104 warn("Ignoring process request to set the integer condition codes "
105 "at pc %#x.\n", tc
->readPC());
108 panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum
);
113 SparcLiveProcess::startup()
117 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
120 //Setup default FP state
121 tc
->setMiscRegNoEffect(MISCREG_FSR
, 0);
123 tc
->setMiscRegNoEffect(MISCREG_TICK
, 0);
126 * Register window management registers
129 //No windows contain info from other programs
130 //tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
131 tc
->setIntReg(NumIntArchRegs
+ 6, 0);
132 //There are no windows to pop
133 //tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
134 tc
->setIntReg(NumIntArchRegs
+ 4, 0);
135 //All windows are available to save into
136 //tc->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
137 tc
->setIntReg(NumIntArchRegs
+ 3, NWindows
- 2);
138 //All windows are "clean"
139 //tc->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
140 tc
->setIntReg(NumIntArchRegs
+ 5, NWindows
);
141 //Start with register window 0
142 tc
->setMiscRegNoEffect(MISCREG_CWP
, 0);
143 //Always use spill and fill traps 0
144 //tc->setMiscRegNoEffect(MISCREG_WSTATE, 0);
145 tc
->setIntReg(NumIntArchRegs
+ 7, 0);
146 //Set the trap level to 0
147 tc
->setMiscRegNoEffect(MISCREG_TL
, 0);
148 //Set the ASI register to something fixed
149 tc
->setMiscRegNoEffect(MISCREG_ASI
, ASI_PRIMARY
);
152 * T1 specific registers
154 //Turn on the icache, dcache, dtb translation, and itb translation.
155 tc
->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL
, 15);
159 Sparc32LiveProcess::startup()
161 if (checkpointRestored
)
164 SparcLiveProcess::startup();
166 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
167 //The process runs in user mode with 32 bit addresses
168 tc
->setMiscReg(MISCREG_PSTATE
, 0x0a);
170 argsInit(32 / 8, VMPageSize
);
174 Sparc64LiveProcess::startup()
176 if (checkpointRestored
)
179 SparcLiveProcess::startup();
181 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
182 //The process runs in user mode
183 tc
->setMiscReg(MISCREG_PSTATE
, 0x02);
185 argsInit(sizeof(IntReg
), VMPageSize
);
188 template<class IntType
>
190 SparcLiveProcess::argsInit(int pageSize
)
192 int intSize
= sizeof(IntType
);
194 typedef AuxVector
<IntType
> auxv_t
;
196 std::vector
<auxv_t
> auxv
;
204 //Even for a 32 bit process, the ABI says we still need to
205 //maintain double word alignment of the stack pointer.
208 // load object file into target memory
209 objFile
->loadSections(initVirtMem
);
213 M5_HWCAP_SPARC_FLUSH
= 1,
214 M5_HWCAP_SPARC_STBAR
= 2,
215 M5_HWCAP_SPARC_SWAP
= 4,
216 M5_HWCAP_SPARC_MULDIV
= 8,
217 M5_HWCAP_SPARC_V9
= 16,
218 //This one should technically only be set
219 //if there is a cheetah or cheetah_plus tlb,
220 //but we'll use it all the time
221 M5_HWCAP_SPARC_ULTRA3
= 32
224 const int64_t hwcap
=
225 M5_HWCAP_SPARC_FLUSH
|
226 M5_HWCAP_SPARC_STBAR
|
227 M5_HWCAP_SPARC_SWAP
|
228 M5_HWCAP_SPARC_MULDIV
|
230 M5_HWCAP_SPARC_ULTRA3
;
232 //Setup the auxilliary vectors. These will already have endian conversion.
233 //Auxilliary vectors are loaded only for elf formatted executables.
234 ElfObject
* elfObject
= dynamic_cast<ElfObject
*>(objFile
);
237 //Bits which describe the system hardware capabilities
238 auxv
.push_back(auxv_t(M5_AT_HWCAP
, hwcap
));
239 //The system page size
240 auxv
.push_back(auxv_t(M5_AT_PAGESZ
, SparcISA::VMPageSize
));
241 //Defined to be 100 in the kernel source.
242 //Frequency at which times() increments
243 auxv
.push_back(auxv_t(M5_AT_CLKTCK
, 100));
244 // For statically linked executables, this is the virtual address of the
245 // program header tables if they appear in the executable image
246 auxv
.push_back(auxv_t(M5_AT_PHDR
, elfObject
->programHeaderTable()));
247 // This is the size of a program header entry from the elf file.
248 auxv
.push_back(auxv_t(M5_AT_PHENT
, elfObject
->programHeaderSize()));
249 // This is the number of program headers from the original elf file.
250 auxv
.push_back(auxv_t(M5_AT_PHNUM
, elfObject
->programHeaderCount()));
251 //This is the address of the elf "interpreter", It should be set
252 //to 0 for regular executables. It should be something else
253 //(not sure what) for dynamic libraries.
254 auxv
.push_back(auxv_t(M5_AT_BASE
, 0));
255 //This is hardwired to 0 in the elf loading code in the kernel
256 auxv
.push_back(auxv_t(M5_AT_FLAGS
, 0));
257 //The entry point to the program
258 auxv
.push_back(auxv_t(M5_AT_ENTRY
, objFile
->entryPoint()));
259 //Different user and group IDs
260 auxv
.push_back(auxv_t(M5_AT_UID
, uid()));
261 auxv
.push_back(auxv_t(M5_AT_EUID
, euid()));
262 auxv
.push_back(auxv_t(M5_AT_GID
, gid()));
263 auxv
.push_back(auxv_t(M5_AT_EGID
, egid()));
264 //Whether to enable "secure mode" in the executable
265 auxv
.push_back(auxv_t(M5_AT_SECURE
, 0));
268 //Figure out how big the initial stack needs to be
270 // The unaccounted for 8 byte 0 at the top of the stack
273 //This is the name of the file which is present on the initial stack
274 //It's purpose is to let the user space linker examine the original file.
275 int file_name_size
= filename
.size() + 1;
277 int env_data_size
= 0;
278 for (int i
= 0; i
< envp
.size(); ++i
) {
279 env_data_size
+= envp
[i
].size() + 1;
281 int arg_data_size
= 0;
282 for (int i
= 0; i
< argv
.size(); ++i
) {
283 arg_data_size
+= argv
[i
].size() + 1;
287 int base_info_block_size
=
288 sentry_size
+ file_name_size
+ env_data_size
+ arg_data_size
;
290 int info_block_size
= roundUp(base_info_block_size
, align
);
292 int info_block_padding
= info_block_size
- base_info_block_size
;
294 //Each auxilliary vector is two words
295 int aux_array_size
= intSize
* 2 * (auxv
.size() + 1);
297 int envp_array_size
= intSize
* (envp
.size() + 1);
298 int argv_array_size
= intSize
* (argv
.size() + 1);
300 int argc_size
= intSize
;
301 int window_save_size
= intSize
* 16;
303 //Figure out the size of the contents of the actual initial frame
311 //There needs to be padding after the auxiliary vector data so that the
312 //very bottom of the stack is aligned properly.
313 int aligned_partial_size
= roundUp(frame_size
, align
);
314 int aux_padding
= aligned_partial_size
- frame_size
;
321 stack_min
= stack_base
- space_needed
;
322 stack_min
= roundDown(stack_min
, align
);
323 stack_size
= stack_base
- stack_min
;
325 // Allocate space for the stack
326 pTable
->allocate(roundDown(stack_min
, pageSize
),
327 roundUp(stack_size
, pageSize
));
329 // map out initial stack contents
330 IntType sentry_base
= stack_base
- sentry_size
;
331 IntType file_name_base
= sentry_base
- file_name_size
;
332 IntType env_data_base
= file_name_base
- env_data_size
;
333 IntType arg_data_base
= env_data_base
- arg_data_size
;
334 IntType auxv_array_base
= arg_data_base
-
335 info_block_padding
- aux_array_size
- aux_padding
;
336 IntType envp_array_base
= auxv_array_base
- envp_array_size
;
337 IntType argv_array_base
= envp_array_base
- argv_array_size
;
338 IntType argc_base
= argv_array_base
- argc_size
;
340 IntType window_save_base
= argc_base
- window_save_size
;
343 DPRINTF(Stack
, "The addresses of items on the initial stack:\n");
344 DPRINTF(Stack
, "%#x - sentry NULL\n", sentry_base
);
345 DPRINTF(Stack
, "filename = %s\n", filename
);
346 DPRINTF(Stack
, "%#x - file name\n", file_name_base
);
347 DPRINTF(Stack
, "%#x - env data\n", env_data_base
);
348 DPRINTF(Stack
, "%#x - arg data\n", arg_data_base
);
349 DPRINTF(Stack
, "%#x - auxv array\n", auxv_array_base
);
350 DPRINTF(Stack
, "%#x - envp array\n", envp_array_base
);
351 DPRINTF(Stack
, "%#x - argv array\n", argv_array_base
);
352 DPRINTF(Stack
, "%#x - argc \n", argc_base
);
353 DPRINTF(Stack
, "%#x - window save\n", window_save_base
);
354 DPRINTF(Stack
, "%#x - stack min\n", stack_min
);
356 assert(window_save_base
== stack_min
);
358 // write contents to stack
361 IntType argc
= argv
.size();
362 IntType guestArgc
= SparcISA::htog(argc
);
364 //Write out the sentry void *
365 uint64_t sentry_NULL
= 0;
366 initVirtMem
->writeBlob(sentry_base
,
367 (uint8_t*)&sentry_NULL
, sentry_size
);
369 //Write the file name
370 initVirtMem
->writeString(file_name_base
, filename
.c_str());
373 for(int x
= 0; x
< auxv
.size(); x
++)
375 initVirtMem
->writeBlob(auxv_array_base
+ x
* 2 * intSize
,
376 (uint8_t*)&(auxv
[x
].a_type
), intSize
);
377 initVirtMem
->writeBlob(auxv_array_base
+ (x
* 2 + 1) * intSize
,
378 (uint8_t*)&(auxv
[x
].a_val
), intSize
);
381 //Write out the terminating zeroed auxilliary vector
382 const IntType zero
= 0;
383 initVirtMem
->writeBlob(auxv_array_base
+ intSize
* 2 * auxv
.size(),
384 (uint8_t*)&zero
, intSize
);
385 initVirtMem
->writeBlob(auxv_array_base
+ intSize
* (2 * auxv
.size() + 1),
386 (uint8_t*)&zero
, intSize
);
388 copyStringArray(envp
, envp_array_base
, env_data_base
, initVirtMem
);
389 copyStringArray(argv
, argv_array_base
, arg_data_base
, initVirtMem
);
391 initVirtMem
->writeBlob(argc_base
, (uint8_t*)&guestArgc
, intSize
);
393 //Set up space for the trap handlers into the processes address space.
394 //Since the stack grows down and there is reserved address space abov
395 //it, we can put stuff above it and stay out of the way.
396 fillStart
= stack_base
;
397 spillStart
= fillStart
+ sizeof(MachInst
) * numFillInsts
;
399 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
400 //Set up the thread context to start running the process
401 //assert(NumArgumentRegs >= 2);
402 //tc->setIntReg(ArgumentReg[0], argc);
403 //tc->setIntReg(ArgumentReg[1], argv_array_base);
404 tc
->setIntReg(StackPointerReg
, stack_min
- StackBias
);
406 // %g1 is a pointer to a function that should be run at exit. Since we
407 // don't have anything like that, it should be set to 0.
410 Addr prog_entry
= objFile
->entryPoint();
411 tc
->setPC(prog_entry
);
412 tc
->setNextPC(prog_entry
+ sizeof(MachInst
));
413 tc
->setNextNPC(prog_entry
+ (2 * sizeof(MachInst
)));
415 //Align the "stack_min" to a page boundary.
416 stack_min
= roundDown(stack_min
, pageSize
);
422 Sparc64LiveProcess::argsInit(int intSize
, int pageSize
)
424 SparcLiveProcess::argsInit
<uint64_t>(pageSize
);
426 // Stuff the trap handlers into the process address space
427 initVirtMem
->writeBlob(fillStart
,
428 (uint8_t*)fillHandler64
, sizeof(MachInst
) * numFillInsts
);
429 initVirtMem
->writeBlob(spillStart
,
430 (uint8_t*)spillHandler64
, sizeof(MachInst
) * numSpillInsts
);
434 Sparc32LiveProcess::argsInit(int intSize
, int pageSize
)
436 SparcLiveProcess::argsInit
<uint32_t>(pageSize
);
438 // Stuff the trap handlers into the process address space
439 initVirtMem
->writeBlob(fillStart
,
440 (uint8_t*)fillHandler32
, sizeof(MachInst
) * numFillInsts
);
441 initVirtMem
->writeBlob(spillStart
,
442 (uint8_t*)spillHandler32
, sizeof(MachInst
) * numSpillInsts
);
445 void Sparc32LiveProcess::flushWindows(ThreadContext
*tc
)
447 IntReg Cansave
= tc
->readIntReg(NumIntArchRegs
+ 3);
448 IntReg Canrestore
= tc
->readIntReg(NumIntArchRegs
+ 4);
449 IntReg Otherwin
= tc
->readIntReg(NumIntArchRegs
+ 6);
450 MiscReg CWP
= tc
->readMiscReg(MISCREG_CWP
);
451 MiscReg origCWP
= CWP
;
452 CWP
= (CWP
+ Cansave
+ 2) % NWindows
;
453 while(NWindows
- 2 - Cansave
!= 0)
456 panic("Otherwin non-zero.\n");
458 tc
->setMiscReg(MISCREG_CWP
, CWP
);
460 IntReg sp
= tc
->readIntReg(StackPointerReg
);
461 for (int index
= 16; index
< 32; index
++) {
462 uint32_t regVal
= tc
->readIntReg(index
);
463 regVal
= htog(regVal
);
464 if (!tc
->getMemPort()->tryWriteBlob(
465 sp
+ (index
- 16) * 4, (uint8_t *)®Val
, 4)) {
466 warn("Failed to save register to the stack when "
467 "flushing windows.\n");
472 CWP
= (CWP
+ 1) % NWindows
;
475 tc
->setIntReg(NumIntArchRegs
+ 3, Cansave
);
476 tc
->setIntReg(NumIntArchRegs
+ 4, Canrestore
);
477 tc
->setMiscReg(MISCREG_CWP
, origCWP
);
480 void Sparc64LiveProcess::flushWindows(ThreadContext
*tc
)
482 IntReg Cansave
= tc
->readIntReg(NumIntArchRegs
+ 3);
483 IntReg Canrestore
= tc
->readIntReg(NumIntArchRegs
+ 4);
484 IntReg Otherwin
= tc
->readIntReg(NumIntArchRegs
+ 6);
485 MiscReg CWP
= tc
->readMiscReg(MISCREG_CWP
);
486 MiscReg origCWP
= CWP
;
487 CWP
= (CWP
+ Cansave
+ 2) % NWindows
;
488 while(NWindows
- 2 - Cansave
!= 0)
491 panic("Otherwin non-zero.\n");
493 tc
->setMiscReg(MISCREG_CWP
, CWP
);
495 IntReg sp
= tc
->readIntReg(StackPointerReg
);
496 for (int index
= 16; index
< 32; index
++) {
497 IntReg regVal
= tc
->readIntReg(index
);
498 regVal
= htog(regVal
);
499 if (!tc
->getMemPort()->tryWriteBlob(
500 sp
+ 2047 + (index
- 16) * 8, (uint8_t *)®Val
, 8)) {
501 warn("Failed to save register to the stack when "
502 "flushing windows.\n");
507 CWP
= (CWP
+ 1) % NWindows
;
510 tc
->setIntReg(NumIntArchRegs
+ 3, Cansave
);
511 tc
->setIntReg(NumIntArchRegs
+ 4, Canrestore
);
512 tc
->setMiscReg(MISCREG_CWP
, origCWP
);
516 Sparc32LiveProcess::getSyscallArg(ThreadContext
*tc
, int i
)
519 return bits(tc
->readIntReg(FirstArgumentReg
+ i
), 31, 0);
523 Sparc32LiveProcess::setSyscallArg(ThreadContext
*tc
, int i
, IntReg val
)
526 tc
->setIntReg(FirstArgumentReg
+ i
, bits(val
, 31, 0));
530 Sparc64LiveProcess::getSyscallArg(ThreadContext
*tc
, int i
)
533 return tc
->readIntReg(FirstArgumentReg
+ i
);
537 Sparc64LiveProcess::setSyscallArg(ThreadContext
*tc
, int i
, IntReg val
)
540 tc
->setIntReg(FirstArgumentReg
+ i
, val
);
544 SparcLiveProcess::setSyscallReturn(ThreadContext
*tc
,
545 SyscallReturn return_value
)
547 // check for error condition. SPARC syscall convention is to
548 // indicate success/failure in reg the carry bit of the ccr
549 // and put the return value itself in the standard return value reg ().
550 if (return_value
.successful()) {
551 // no error, clear XCC.C
552 tc
->setIntReg(NumIntArchRegs
+ 2,
553 tc
->readIntReg(NumIntArchRegs
+ 2) & 0xEE);
554 //tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) & 0xEE);
555 IntReg val
= return_value
.value();
556 if (bits(tc
->readMiscRegNoEffect(
557 SparcISA::MISCREG_PSTATE
), 3, 3)) {
558 val
= bits(val
, 31, 0);
560 tc
->setIntReg(ReturnValueReg
, val
);
562 // got an error, set XCC.C
563 tc
->setIntReg(NumIntArchRegs
+ 2,
564 tc
->readIntReg(NumIntArchRegs
+ 2) | 0x11);
565 //tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) | 0x11);
566 IntReg val
= -return_value
.value();
567 if (bits(tc
->readMiscRegNoEffect(
568 SparcISA::MISCREG_PSTATE
), 3, 3)) {
569 val
= bits(val
, 31, 0);
571 tc
->setIntReg(ReturnValueReg
, val
);