src/arch/sparc/process.cc

   1 /*
   2  * Copyright (c) 2003-2004 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Ali Saidi
  30  */
  31
  32 #include "arch/sparc/process.hh"
  33
  34 #include "arch/sparc/asi.hh"
  35 #include "arch/sparc/handlers.hh"
  36 #include "arch/sparc/isa_traits.hh"
  37 #include "arch/sparc/registers.hh"
  38 #include "arch/sparc/types.hh"
  39 #include "base/loader/elf_object.hh"
  40 #include "base/loader/object_file.hh"
  41 #include "base/misc.hh"
  42 #include "cpu/thread_context.hh"
  43 #include "debug/Stack.hh"
  44 #include "mem/page_table.hh"
  45 #include "sim/process_impl.hh"
  46 #include "sim/syscall_return.hh"
  47 #include "sim/system.hh"
  48
  49 using namespace std;
  50 using namespace SparcISA;
  51
  52 static const int FirstArgumentReg = 8;
  53
  54
  55 SparcLiveProcess::SparcLiveProcess(LiveProcessParams * params,
  56         ObjectFile *objFile, Addr _StackBias)
  57     : LiveProcess(params, objFile), StackBias(_StackBias)
  58 {
  59
  60     // XXX all the below need to be updated for SPARC - Ali
  61     brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
  62     brk_point = roundUp(brk_point, PageBytes);
  63
  64     // Set pointer for next thread stack.  Reserve 8M for main stack.
  65     next_thread_stack_base = stack_base - (8 * 1024 * 1024);
  66
  67     // Initialize these to 0s
  68     fillStart = 0;
  69     spillStart = 0;
  70 }
  71
  72 void
  73 SparcLiveProcess::handleTrap(int trapNum, ThreadContext *tc)
  74 {
  75     PCState pc = tc->pcState();
  76     switch (trapNum) {
  77       case 0x01: // Software breakpoint
  78         warn("Software breakpoint encountered at pc %#x.\n", pc.pc());
  79         break;
  80       case 0x02: // Division by zero
  81         warn("Software signaled a division by zero at pc %#x.\n", pc.pc());
  82         break;
  83       case 0x03: // Flush window trap
  84         flushWindows(tc);
  85         break;
  86       case 0x04: // Clean windows
  87         warn("Ignoring process request for clean register "
  88                 "windows at pc %#x.\n", pc.pc());
  89         break;
  90       case 0x05: // Range check
  91         warn("Software signaled a range check at pc %#x.\n", pc.pc());
  92         break;
  93       case 0x06: // Fix alignment
  94         warn("Ignoring process request for os assisted unaligned accesses "
  95                 "at pc %#x.\n", pc.pc());
  96         break;
  97       case 0x07: // Integer overflow
  98         warn("Software signaled an integer overflow at pc %#x.\n", pc.pc());
  99         break;
 100       case 0x32: // Get integer condition codes
 101         warn("Ignoring process request to get the integer condition codes "
 102                 "at pc %#x.\n", pc.pc());
 103         break;
 104       case 0x33: // Set integer condition codes
 105         warn("Ignoring process request to set the integer condition codes "
 106                 "at pc %#x.\n", pc.pc());
 107         break;
 108       default:
 109         panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum);
 110     }
 111 }
 112
 113 void
 114 SparcLiveProcess::initState()
 115 {
 116     LiveProcess::initState();
 117
 118     ThreadContext *tc = system->getThreadContext(contextIds[0]);
 119     // From the SPARC ABI
 120
 121     // Setup default FP state
 122     tc->setMiscRegNoEffect(MISCREG_FSR, 0);
 123
 124     tc->setMiscRegNoEffect(MISCREG_TICK, 0);
 125
 126     /*
 127      * Register window management registers
 128      */
 129
 130     // No windows contain info from other programs
 131     // tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
 132     tc->setIntReg(NumIntArchRegs + 6, 0);
 133     // There are no windows to pop
 134     // tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
 135     tc->setIntReg(NumIntArchRegs + 4, 0);
 136     // All windows are available to save into
 137     // tc->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
 138     tc->setIntReg(NumIntArchRegs + 3, NWindows - 2);
 139     // All windows are "clean"
 140     // tc->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
 141     tc->setIntReg(NumIntArchRegs + 5, NWindows);
 142     // Start with register window 0
 143     tc->setMiscReg(MISCREG_CWP, 0);
 144     // Always use spill and fill traps 0
 145     // tc->setMiscRegNoEffect(MISCREG_WSTATE, 0);
 146     tc->setIntReg(NumIntArchRegs + 7, 0);
 147     // Set the trap level to 0
 148     tc->setMiscRegNoEffect(MISCREG_TL, 0);
 149     // Set the ASI register to something fixed
 150     tc->setMiscReg(MISCREG_ASI, ASI_PRIMARY);
 151
 152     /*
 153      * T1 specific registers
 154      */
 155     // Turn on the icache, dcache, dtb translation, and itb translation.
 156     tc->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL, 15);
 157 }
 158
 159 void
 160 Sparc32LiveProcess::initState()
 161 {
 162     SparcLiveProcess::initState();
 163
 164     ThreadContext *tc = system->getThreadContext(contextIds[0]);
 165     // The process runs in user mode with 32 bit addresses
 166     PSTATE pstate = 0;
 167     pstate.ie = 1;
 168     pstate.am = 1;
 169     tc->setMiscReg(MISCREG_PSTATE, pstate);
 170
 171     argsInit(32 / 8, PageBytes);
 172 }
 173
 174 void
 175 Sparc64LiveProcess::initState()
 176 {
 177     SparcLiveProcess::initState();
 178
 179     ThreadContext *tc = system->getThreadContext(contextIds[0]);
 180     // The process runs in user mode
 181     PSTATE pstate = 0;
 182     pstate.ie = 1;
 183     tc->setMiscReg(MISCREG_PSTATE, pstate);
 184
 185     argsInit(sizeof(IntReg), PageBytes);
 186 }
 187
 188 template<class IntType>
 189 void
 190 SparcLiveProcess::argsInit(int pageSize)
 191 {
 192     int intSize = sizeof(IntType);
 193
 194     typedef AuxVector<IntType> auxv_t;
 195
 196     std::vector<auxv_t> auxv;
 197
 198     string filename;
 199     if (argv.size() < 1)
 200         filename = "";
 201     else
 202         filename = argv[0];
 203
 204     // Even for a 32 bit process, the ABI says we still need to
 205     // maintain double word alignment of the stack pointer.
 206     uint64_t align = 16;
 207
 208     // Patch the ld_bias for dynamic executables.
 209     updateBias();
 210
 211     // load object file into target memory
 212     objFile->loadSections(initVirtMem);
 213
 214     enum hardwareCaps
 215     {
 216         M5_HWCAP_SPARC_FLUSH = 1,
 217         M5_HWCAP_SPARC_STBAR = 2,
 218         M5_HWCAP_SPARC_SWAP = 4,
 219         M5_HWCAP_SPARC_MULDIV = 8,
 220         M5_HWCAP_SPARC_V9 = 16,
 221         // This one should technically only be set
 222         // if there is a cheetah or cheetah_plus tlb,
 223         // but we'll use it all the time
 224         M5_HWCAP_SPARC_ULTRA3 = 32
 225     };
 226
 227     const int64_t hwcap =
 228         M5_HWCAP_SPARC_FLUSH |
 229         M5_HWCAP_SPARC_STBAR |
 230         M5_HWCAP_SPARC_SWAP |
 231         M5_HWCAP_SPARC_MULDIV |
 232         M5_HWCAP_SPARC_V9 |
 233         M5_HWCAP_SPARC_ULTRA3;
 234
 235     // Setup the auxilliary vectors. These will already have endian conversion.
 236     // Auxilliary vectors are loaded only for elf formatted executables.
 237     ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
 238     if (elfObject) {
 239         // Bits which describe the system hardware capabilities
 240         auxv.push_back(auxv_t(M5_AT_HWCAP, hwcap));
 241         // The system page size
 242         auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::PageBytes));
 243         // Defined to be 100 in the kernel source.
 244         // Frequency at which times() increments
 245         auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
 246         // For statically linked executables, this is the virtual address of the
 247         // program header tables if they appear in the executable image
 248         auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
 249         // This is the size of a program header entry from the elf file.
 250         auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
 251         // This is the number of program headers from the original elf file.
 252         auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
 253         // This is the base address of the ELF interpreter; it should be
 254         // zero for static executables or contain the base address for
 255         // dynamic executables.
 256         auxv.push_back(auxv_t(M5_AT_BASE, getBias()));
 257         // This is hardwired to 0 in the elf loading code in the kernel
 258         auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
 259         // The entry point to the program
 260         auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
 261         // Different user and group IDs
 262         auxv.push_back(auxv_t(M5_AT_UID, uid()));
 263         auxv.push_back(auxv_t(M5_AT_EUID, euid()));
 264         auxv.push_back(auxv_t(M5_AT_GID, gid()));
 265         auxv.push_back(auxv_t(M5_AT_EGID, egid()));
 266         // Whether to enable "secure mode" in the executable
 267         auxv.push_back(auxv_t(M5_AT_SECURE, 0));
 268     }
 269
 270     // Figure out how big the initial stack needs to be
 271
 272     // The unaccounted for 8 byte 0 at the top of the stack
 273     int sentry_size = 8;
 274
 275     // This is the name of the file which is present on the initial stack
 276     // It's purpose is to let the user space linker examine the original file.
 277     int file_name_size = filename.size() + 1;
 278
 279     int env_data_size = 0;
 280     for (int i = 0; i < envp.size(); ++i) {
 281         env_data_size += envp[i].size() + 1;
 282     }
 283     int arg_data_size = 0;
 284     for (int i = 0; i < argv.size(); ++i) {
 285         arg_data_size += argv[i].size() + 1;
 286     }
 287
 288     // The info_block.
 289     int base_info_block_size =
 290         sentry_size + file_name_size + env_data_size + arg_data_size;
 291
 292     int info_block_size = roundUp(base_info_block_size, align);
 293
 294     int info_block_padding = info_block_size - base_info_block_size;
 295
 296     // Each auxilliary vector is two words
 297     int aux_array_size = intSize * 2 * (auxv.size() + 1);
 298
 299     int envp_array_size = intSize * (envp.size() + 1);
 300     int argv_array_size = intSize * (argv.size() + 1);
 301
 302     int argc_size = intSize;
 303     int window_save_size = intSize * 16;
 304
 305     // Figure out the size of the contents of the actual initial frame
 306     int frame_size =
 307         aux_array_size +
 308         envp_array_size +
 309         argv_array_size +
 310         argc_size +
 311         window_save_size;
 312
 313     // There needs to be padding after the auxiliary vector data so that the
 314     // very bottom of the stack is aligned properly.
 315     int aligned_partial_size = roundUp(frame_size, align);
 316     int aux_padding = aligned_partial_size - frame_size;
 317
 318     int space_needed =
 319         info_block_size +
 320         aux_padding +
 321         frame_size;
 322
 323     stack_min = stack_base - space_needed;
 324     stack_min = roundDown(stack_min, align);
 325     stack_size = stack_base - stack_min;
 326
 327     // Allocate space for the stack
 328     allocateMem(roundDown(stack_min, pageSize), roundUp(stack_size, pageSize));
 329
 330     // map out initial stack contents
 331     IntType sentry_base = stack_base - sentry_size;
 332     IntType file_name_base = sentry_base - file_name_size;
 333     IntType env_data_base = file_name_base - env_data_size;
 334     IntType arg_data_base = env_data_base - arg_data_size;
 335     IntType auxv_array_base = arg_data_base -
 336         info_block_padding - aux_array_size - aux_padding;
 337     IntType envp_array_base = auxv_array_base - envp_array_size;
 338     IntType argv_array_base = envp_array_base - argv_array_size;
 339     IntType argc_base = argv_array_base - argc_size;
 340 #if TRACING_ON
 341     IntType window_save_base = argc_base - window_save_size;
 342 #endif
 343
 344     DPRINTF(Stack, "The addresses of items on the initial stack:\n");
 345     DPRINTF(Stack, "%#x - sentry NULL\n", sentry_base);
 346     DPRINTF(Stack, "filename = %s\n", filename);
 347     DPRINTF(Stack, "%#x - file name\n", file_name_base);
 348     DPRINTF(Stack, "%#x - env data\n", env_data_base);
 349     DPRINTF(Stack, "%#x - arg data\n", arg_data_base);
 350     DPRINTF(Stack, "%#x - auxv array\n", auxv_array_base);
 351     DPRINTF(Stack, "%#x - envp array\n", envp_array_base);
 352     DPRINTF(Stack, "%#x - argv array\n", argv_array_base);
 353     DPRINTF(Stack, "%#x - argc \n", argc_base);
 354     DPRINTF(Stack, "%#x - window save\n", window_save_base);
 355     DPRINTF(Stack, "%#x - stack min\n", stack_min);
 356
 357     assert(window_save_base == stack_min);
 358
 359     // write contents to stack
 360
 361     // figure out argc
 362     IntType argc = argv.size();
 363     IntType guestArgc = SparcISA::htog(argc);
 364
 365     // Write out the sentry void *
 366     uint64_t sentry_NULL = 0;
 367     initVirtMem.writeBlob(sentry_base,
 368             (uint8_t*)&sentry_NULL, sentry_size);
 369
 370     // Write the file name
 371     initVirtMem.writeString(file_name_base, filename.c_str());
 372
 373     // Copy the aux stuff
 374     for (int x = 0; x < auxv.size(); x++) {
 375         initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
 376                 (uint8_t*)&(auxv[x].a_type), intSize);
 377         initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
 378                 (uint8_t*)&(auxv[x].a_val), intSize);
 379     }
 380
 381     // Write out the terminating zeroed auxilliary vector
 382     const IntType zero = 0;
 383     initVirtMem.writeBlob(auxv_array_base + intSize * 2 * auxv.size(),
 384             (uint8_t*)&zero, intSize);
 385     initVirtMem.writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1),
 386             (uint8_t*)&zero, intSize);
 387
 388     copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
 389     copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
 390
 391     initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
 392
 393     // Set up space for the trap handlers into the processes address space.
 394     // Since the stack grows down and there is reserved address space abov
 395     // it, we can put stuff above it and stay out of the way.
 396     fillStart = stack_base;
 397     spillStart = fillStart + sizeof(MachInst) * numFillInsts;
 398
 399     ThreadContext *tc = system->getThreadContext(contextIds[0]);
 400     // Set up the thread context to start running the process
 401     // assert(NumArgumentRegs >= 2);
 402     // tc->setIntReg(ArgumentReg[0], argc);
 403     // tc->setIntReg(ArgumentReg[1], argv_array_base);
 404     tc->setIntReg(StackPointerReg, stack_min - StackBias);
 405
 406     // %g1 is a pointer to a function that should be run at exit. Since we
 407     // don't have anything like that, it should be set to 0.
 408     tc->setIntReg(1, 0);
 409
 410     tc->pcState(getStartPC());
 411
 412     // Align the "stack_min" to a page boundary.
 413     stack_min = roundDown(stack_min, pageSize);
 414
 415 //    num_processes++;
 416 }
 417
 418 void
 419 Sparc64LiveProcess::argsInit(int intSize, int pageSize)
 420 {
 421     SparcLiveProcess::argsInit<uint64_t>(pageSize);
 422
 423     // Stuff the trap handlers into the process address space
 424     initVirtMem.writeBlob(fillStart,
 425             (uint8_t*)fillHandler64, sizeof(MachInst) * numFillInsts);
 426     initVirtMem.writeBlob(spillStart,
 427             (uint8_t*)spillHandler64, sizeof(MachInst) *  numSpillInsts);
 428 }
 429
 430 void
 431 Sparc32LiveProcess::argsInit(int intSize, int pageSize)
 432 {
 433     SparcLiveProcess::argsInit<uint32_t>(pageSize);
 434
 435     // Stuff the trap handlers into the process address space
 436     initVirtMem.writeBlob(fillStart,
 437             (uint8_t*)fillHandler32, sizeof(MachInst) * numFillInsts);
 438     initVirtMem.writeBlob(spillStart,
 439             (uint8_t*)spillHandler32, sizeof(MachInst) *  numSpillInsts);
 440 }
 441
 442 void Sparc32LiveProcess::flushWindows(ThreadContext *tc)
 443 {
 444     IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
 445     IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
 446     IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
 447     MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
 448     MiscReg origCWP = CWP;
 449     CWP = (CWP + Cansave + 2) % NWindows;
 450     while (NWindows - 2 - Cansave != 0) {
 451         if (Otherwin) {
 452             panic("Otherwin non-zero.\n");
 453         } else {
 454             tc->setMiscReg(MISCREG_CWP, CWP);
 455             // Do the stores
 456             IntReg sp = tc->readIntReg(StackPointerReg);
 457             for (int index = 16; index < 32; index++) {
 458                 uint32_t regVal = tc->readIntReg(index);
 459                 regVal = htog(regVal);
 460                 if (!tc->getMemProxy().tryWriteBlob(
 461                         sp + (index - 16) * 4, (uint8_t *)&regVal, 4)) {
 462                     warn("Failed to save register to the stack when "
 463                             "flushing windows.\n");
 464                 }
 465             }
 466             Canrestore--;
 467             Cansave++;
 468             CWP = (CWP + 1) % NWindows;
 469         }
 470     }
 471     tc->setIntReg(NumIntArchRegs + 3, Cansave);
 472     tc->setIntReg(NumIntArchRegs + 4, Canrestore);
 473     tc->setMiscReg(MISCREG_CWP, origCWP);
 474 }
 475
 476 void
 477 Sparc64LiveProcess::flushWindows(ThreadContext *tc)
 478 {
 479     IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
 480     IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
 481     IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
 482     MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
 483     MiscReg origCWP = CWP;
 484     CWP = (CWP + Cansave + 2) % NWindows;
 485     while (NWindows - 2 - Cansave != 0) {
 486         if (Otherwin) {
 487             panic("Otherwin non-zero.\n");
 488         } else {
 489             tc->setMiscReg(MISCREG_CWP, CWP);
 490             // Do the stores
 491             IntReg sp = tc->readIntReg(StackPointerReg);
 492             for (int index = 16; index < 32; index++) {
 493                 IntReg regVal = tc->readIntReg(index);
 494                 regVal = htog(regVal);
 495                 if (!tc->getMemProxy().tryWriteBlob(
 496                         sp + 2047 + (index - 16) * 8, (uint8_t *)&regVal, 8)) {
 497                     warn("Failed to save register to the stack when "
 498                             "flushing windows.\n");
 499                 }
 500             }
 501             Canrestore--;
 502             Cansave++;
 503             CWP = (CWP + 1) % NWindows;
 504         }
 505     }
 506     tc->setIntReg(NumIntArchRegs + 3, Cansave);
 507     tc->setIntReg(NumIntArchRegs + 4, Canrestore);
 508     tc->setMiscReg(MISCREG_CWP, origCWP);
 509 }
 510
 511 IntReg
 512 Sparc32LiveProcess::getSyscallArg(ThreadContext *tc, int &i)
 513 {
 514     assert(i < 6);
 515     return bits(tc->readIntReg(FirstArgumentReg + i++), 31, 0);
 516 }
 517
 518 void
 519 Sparc32LiveProcess::setSyscallArg(ThreadContext *tc, int i, IntReg val)
 520 {
 521     assert(i < 6);
 522     tc->setIntReg(FirstArgumentReg + i, bits(val, 31, 0));
 523 }
 524
 525 IntReg
 526 Sparc64LiveProcess::getSyscallArg(ThreadContext *tc, int &i)
 527 {
 528     assert(i < 6);
 529     return tc->readIntReg(FirstArgumentReg + i++);
 530 }
 531
 532 void
 533 Sparc64LiveProcess::setSyscallArg(ThreadContext *tc, int i, IntReg val)
 534 {
 535     assert(i < 6);
 536     tc->setIntReg(FirstArgumentReg + i, val);
 537 }
 538
 539 void
 540 SparcLiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
 541 {
 542     // check for error condition.  SPARC syscall convention is to
 543     // indicate success/failure in reg the carry bit of the ccr
 544     // and put the return value itself in the standard return value reg ().
 545     PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
 546     if (sysret.successful()) {
 547         // no error, clear XCC.C
 548         tc->setIntReg(NumIntArchRegs + 2,
 549                       tc->readIntReg(NumIntArchRegs + 2) & 0xEE);
 550         IntReg val = sysret.returnValue();
 551         if (pstate.am)
 552             val = bits(val, 31, 0);
 553         tc->setIntReg(ReturnValueReg, val);
 554     } else {
 555         // got an error, set XCC.C
 556         tc->setIntReg(NumIntArchRegs + 2,
 557                       tc->readIntReg(NumIntArchRegs + 2) | 0x11);
 558         IntReg val = sysret.errnoValue();
 559         if (pstate.am)
 560             val = bits(val, 31, 0);
 561         tc->setIntReg(ReturnValueReg, val);
 562     }
 563 }