2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
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14 * this software without specific prior written permission.
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17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 #include "arch/sparc/process.hh"
34 #include "arch/sparc/asi.hh"
35 #include "arch/sparc/handlers.hh"
36 #include "arch/sparc/isa_traits.hh"
37 #include "arch/sparc/registers.hh"
38 #include "arch/sparc/types.hh"
39 #include "base/loader/elf_object.hh"
40 #include "base/loader/object_file.hh"
41 #include "base/logging.hh"
42 #include "cpu/thread_context.hh"
43 #include "debug/Stack.hh"
44 #include "mem/page_table.hh"
45 #include "sim/aux_vector.hh"
46 #include "sim/process_impl.hh"
47 #include "sim/syscall_return.hh"
48 #include "sim/system.hh"
51 using namespace SparcISA
;
53 static const int FirstArgumentReg
= 8;
56 SparcProcess::SparcProcess(ProcessParams
* params
, ObjectFile
*objFile
,
58 : Process(params
, objFile
), StackBias(_StackBias
)
60 // Initialize these to 0s
66 SparcProcess::handleTrap(int trapNum
, ThreadContext
*tc
, Fault
*fault
)
68 PCState pc
= tc
->pcState();
70 case 0x01: // Software breakpoint
71 warn("Software breakpoint encountered at pc %#x.\n", pc
.pc());
73 case 0x02: // Division by zero
74 warn("Software signaled a division by zero at pc %#x.\n", pc
.pc());
76 case 0x03: // Flush window trap
79 case 0x04: // Clean windows
80 warn("Ignoring process request for clean register "
81 "windows at pc %#x.\n", pc
.pc());
83 case 0x05: // Range check
84 warn("Software signaled a range check at pc %#x.\n", pc
.pc());
86 case 0x06: // Fix alignment
87 warn("Ignoring process request for os assisted unaligned accesses "
88 "at pc %#x.\n", pc
.pc());
90 case 0x07: // Integer overflow
91 warn("Software signaled an integer overflow at pc %#x.\n", pc
.pc());
93 case 0x32: // Get integer condition codes
94 warn("Ignoring process request to get the integer condition codes "
95 "at pc %#x.\n", pc
.pc());
97 case 0x33: // Set integer condition codes
98 warn("Ignoring process request to set the integer condition codes "
99 "at pc %#x.\n", pc
.pc());
102 panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum
);
107 SparcProcess::initState()
109 Process::initState();
111 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
112 // From the SPARC ABI
114 // Setup default FP state
115 tc
->setMiscRegNoEffect(MISCREG_FSR
, 0);
117 tc
->setMiscRegNoEffect(MISCREG_TICK
, 0);
120 * Register window management registers
123 // No windows contain info from other programs
124 // tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
125 tc
->setIntReg(NumIntArchRegs
+ 6, 0);
126 // There are no windows to pop
127 // tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
128 tc
->setIntReg(NumIntArchRegs
+ 4, 0);
129 // All windows are available to save into
130 // tc->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
131 tc
->setIntReg(NumIntArchRegs
+ 3, NWindows
- 2);
132 // All windows are "clean"
133 // tc->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
134 tc
->setIntReg(NumIntArchRegs
+ 5, NWindows
);
135 // Start with register window 0
136 tc
->setMiscReg(MISCREG_CWP
, 0);
137 // Always use spill and fill traps 0
138 // tc->setMiscRegNoEffect(MISCREG_WSTATE, 0);
139 tc
->setIntReg(NumIntArchRegs
+ 7, 0);
140 // Set the trap level to 0
141 tc
->setMiscRegNoEffect(MISCREG_TL
, 0);
142 // Set the ASI register to something fixed
143 tc
->setMiscReg(MISCREG_ASI
, ASI_PRIMARY
);
145 // Set the MMU Primary Context Register to hold the process' pid
146 tc
->setMiscReg(MISCREG_MMU_P_CONTEXT
, _pid
);
149 * T1 specific registers
151 // Turn on the icache, dcache, dtb translation, and itb translation.
152 tc
->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL
, 15);
156 Sparc32Process::initState()
158 SparcProcess::initState();
160 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
161 // The process runs in user mode with 32 bit addresses
165 tc
->setMiscReg(MISCREG_PSTATE
, pstate
);
167 argsInit(32 / 8, PageBytes
);
171 Sparc64Process::initState()
173 SparcProcess::initState();
175 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
176 // The process runs in user mode
179 tc
->setMiscReg(MISCREG_PSTATE
, pstate
);
181 argsInit(sizeof(IntReg
), PageBytes
);
184 template<class IntType
>
186 SparcProcess::argsInit(int pageSize
)
188 int intSize
= sizeof(IntType
);
190 typedef AuxVector
<IntType
> auxv_t
;
192 std::vector
<auxv_t
> auxv
;
200 // Even for a 32 bit process, the ABI says we still need to
201 // maintain double word alignment of the stack pointer.
204 // Patch the ld_bias for dynamic executables.
207 // load object file into target memory
208 objFile
->loadSections(initVirtMem
);
212 M5_HWCAP_SPARC_FLUSH
= 1,
213 M5_HWCAP_SPARC_STBAR
= 2,
214 M5_HWCAP_SPARC_SWAP
= 4,
215 M5_HWCAP_SPARC_MULDIV
= 8,
216 M5_HWCAP_SPARC_V9
= 16,
217 // This one should technically only be set
218 // if there is a cheetah or cheetah_plus tlb,
219 // but we'll use it all the time
220 M5_HWCAP_SPARC_ULTRA3
= 32
223 const int64_t hwcap
=
224 M5_HWCAP_SPARC_FLUSH
|
225 M5_HWCAP_SPARC_STBAR
|
226 M5_HWCAP_SPARC_SWAP
|
227 M5_HWCAP_SPARC_MULDIV
|
229 M5_HWCAP_SPARC_ULTRA3
;
231 // Setup the auxilliary vectors. These will already have endian conversion.
232 // Auxilliary vectors are loaded only for elf formatted executables.
233 ElfObject
* elfObject
= dynamic_cast<ElfObject
*>(objFile
);
235 // Bits which describe the system hardware capabilities
236 auxv
.push_back(auxv_t(M5_AT_HWCAP
, hwcap
));
237 // The system page size
238 auxv
.push_back(auxv_t(M5_AT_PAGESZ
, SparcISA::PageBytes
));
239 // Defined to be 100 in the kernel source.
240 // Frequency at which times() increments
241 auxv
.push_back(auxv_t(M5_AT_CLKTCK
, 100));
242 // For statically linked executables, this is the virtual address of the
243 // program header tables if they appear in the executable image
244 auxv
.push_back(auxv_t(M5_AT_PHDR
, elfObject
->programHeaderTable()));
245 // This is the size of a program header entry from the elf file.
246 auxv
.push_back(auxv_t(M5_AT_PHENT
, elfObject
->programHeaderSize()));
247 // This is the number of program headers from the original elf file.
248 auxv
.push_back(auxv_t(M5_AT_PHNUM
, elfObject
->programHeaderCount()));
249 // This is the base address of the ELF interpreter; it should be
250 // zero for static executables or contain the base address for
251 // dynamic executables.
252 auxv
.push_back(auxv_t(M5_AT_BASE
, getBias()));
253 // This is hardwired to 0 in the elf loading code in the kernel
254 auxv
.push_back(auxv_t(M5_AT_FLAGS
, 0));
255 // The entry point to the program
256 auxv
.push_back(auxv_t(M5_AT_ENTRY
, objFile
->entryPoint()));
257 // Different user and group IDs
258 auxv
.push_back(auxv_t(M5_AT_UID
, uid()));
259 auxv
.push_back(auxv_t(M5_AT_EUID
, euid()));
260 auxv
.push_back(auxv_t(M5_AT_GID
, gid()));
261 auxv
.push_back(auxv_t(M5_AT_EGID
, egid()));
262 // Whether to enable "secure mode" in the executable
263 auxv
.push_back(auxv_t(M5_AT_SECURE
, 0));
266 // Figure out how big the initial stack needs to be
268 // The unaccounted for 8 byte 0 at the top of the stack
271 // This is the name of the file which is present on the initial stack
272 // It's purpose is to let the user space linker examine the original file.
273 int file_name_size
= filename
.size() + 1;
275 int env_data_size
= 0;
276 for (int i
= 0; i
< envp
.size(); ++i
) {
277 env_data_size
+= envp
[i
].size() + 1;
279 int arg_data_size
= 0;
280 for (int i
= 0; i
< argv
.size(); ++i
) {
281 arg_data_size
+= argv
[i
].size() + 1;
285 int base_info_block_size
=
286 sentry_size
+ file_name_size
+ env_data_size
+ arg_data_size
;
288 int info_block_size
= roundUp(base_info_block_size
, align
);
290 int info_block_padding
= info_block_size
- base_info_block_size
;
292 // Each auxilliary vector is two words
293 int aux_array_size
= intSize
* 2 * (auxv
.size() + 1);
295 int envp_array_size
= intSize
* (envp
.size() + 1);
296 int argv_array_size
= intSize
* (argv
.size() + 1);
298 int argc_size
= intSize
;
299 int window_save_size
= intSize
* 16;
301 // Figure out the size of the contents of the actual initial frame
309 // There needs to be padding after the auxiliary vector data so that the
310 // very bottom of the stack is aligned properly.
311 int aligned_partial_size
= roundUp(frame_size
, align
);
312 int aux_padding
= aligned_partial_size
- frame_size
;
319 memState
->setStackMin(memState
->getStackBase() - space_needed
);
320 memState
->setStackMin(roundDown(memState
->getStackMin(), align
));
321 memState
->setStackSize(memState
->getStackBase() - memState
->getStackMin());
323 // Allocate space for the stack
324 allocateMem(roundDown(memState
->getStackMin(), pageSize
),
325 roundUp(memState
->getStackSize(), pageSize
));
327 // map out initial stack contents
328 IntType sentry_base
= memState
->getStackBase() - sentry_size
;
329 IntType file_name_base
= sentry_base
- file_name_size
;
330 IntType env_data_base
= file_name_base
- env_data_size
;
331 IntType arg_data_base
= env_data_base
- arg_data_size
;
332 IntType auxv_array_base
= arg_data_base
-
333 info_block_padding
- aux_array_size
- aux_padding
;
334 IntType envp_array_base
= auxv_array_base
- envp_array_size
;
335 IntType argv_array_base
= envp_array_base
- argv_array_size
;
336 IntType argc_base
= argv_array_base
- argc_size
;
338 IntType window_save_base
= argc_base
- window_save_size
;
341 DPRINTF(Stack
, "The addresses of items on the initial stack:\n");
342 DPRINTF(Stack
, "%#x - sentry NULL\n", sentry_base
);
343 DPRINTF(Stack
, "filename = %s\n", filename
);
344 DPRINTF(Stack
, "%#x - file name\n", file_name_base
);
345 DPRINTF(Stack
, "%#x - env data\n", env_data_base
);
346 DPRINTF(Stack
, "%#x - arg data\n", arg_data_base
);
347 DPRINTF(Stack
, "%#x - auxv array\n", auxv_array_base
);
348 DPRINTF(Stack
, "%#x - envp array\n", envp_array_base
);
349 DPRINTF(Stack
, "%#x - argv array\n", argv_array_base
);
350 DPRINTF(Stack
, "%#x - argc \n", argc_base
);
351 DPRINTF(Stack
, "%#x - window save\n", window_save_base
);
352 DPRINTF(Stack
, "%#x - stack min\n", memState
->getStackMin());
354 assert(window_save_base
== memState
->getStackMin());
356 // write contents to stack
359 IntType argc
= argv
.size();
360 IntType guestArgc
= SparcISA::htog(argc
);
362 // Write out the sentry void *
363 uint64_t sentry_NULL
= 0;
364 initVirtMem
.writeBlob(sentry_base
,
365 (uint8_t*)&sentry_NULL
, sentry_size
);
367 // Write the file name
368 initVirtMem
.writeString(file_name_base
, filename
.c_str());
370 // Copy the aux stuff
371 for (int x
= 0; x
< auxv
.size(); x
++) {
372 initVirtMem
.writeBlob(auxv_array_base
+ x
* 2 * intSize
,
373 (uint8_t*)&(auxv
[x
].a_type
), intSize
);
374 initVirtMem
.writeBlob(auxv_array_base
+ (x
* 2 + 1) * intSize
,
375 (uint8_t*)&(auxv
[x
].a_val
), intSize
);
378 // Write out the terminating zeroed auxilliary vector
379 const IntType zero
= 0;
380 initVirtMem
.writeBlob(auxv_array_base
+ intSize
* 2 * auxv
.size(),
381 (uint8_t*)&zero
, intSize
);
382 initVirtMem
.writeBlob(auxv_array_base
+ intSize
* (2 * auxv
.size() + 1),
383 (uint8_t*)&zero
, intSize
);
385 copyStringArray(envp
, envp_array_base
, env_data_base
, initVirtMem
);
386 copyStringArray(argv
, argv_array_base
, arg_data_base
, initVirtMem
);
388 initVirtMem
.writeBlob(argc_base
, (uint8_t*)&guestArgc
, intSize
);
390 // Set up space for the trap handlers into the processes address space.
391 // Since the stack grows down and there is reserved address space abov
392 // it, we can put stuff above it and stay out of the way.
393 fillStart
= memState
->getStackBase();
394 spillStart
= fillStart
+ sizeof(MachInst
) * numFillInsts
;
396 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
397 // Set up the thread context to start running the process
398 // assert(NumArgumentRegs >= 2);
399 // tc->setIntReg(ArgumentReg[0], argc);
400 // tc->setIntReg(ArgumentReg[1], argv_array_base);
401 tc
->setIntReg(StackPointerReg
, memState
->getStackMin() - StackBias
);
403 // %g1 is a pointer to a function that should be run at exit. Since we
404 // don't have anything like that, it should be set to 0.
407 tc
->pcState(getStartPC());
409 // Align the "stack_min" to a page boundary.
410 memState
->setStackMin(roundDown(memState
->getStackMin(), pageSize
));
414 Sparc64Process::argsInit(int intSize
, int pageSize
)
416 SparcProcess::argsInit
<uint64_t>(pageSize
);
418 // Stuff the trap handlers into the process address space
419 initVirtMem
.writeBlob(fillStart
,
420 (uint8_t*)fillHandler64
, sizeof(MachInst
) * numFillInsts
);
421 initVirtMem
.writeBlob(spillStart
,
422 (uint8_t*)spillHandler64
, sizeof(MachInst
) * numSpillInsts
);
426 Sparc32Process::argsInit(int intSize
, int pageSize
)
428 SparcProcess::argsInit
<uint32_t>(pageSize
);
430 // Stuff the trap handlers into the process address space
431 initVirtMem
.writeBlob(fillStart
,
432 (uint8_t*)fillHandler32
, sizeof(MachInst
) * numFillInsts
);
433 initVirtMem
.writeBlob(spillStart
,
434 (uint8_t*)spillHandler32
, sizeof(MachInst
) * numSpillInsts
);
437 void Sparc32Process::flushWindows(ThreadContext
*tc
)
439 IntReg Cansave
= tc
->readIntReg(NumIntArchRegs
+ 3);
440 IntReg Canrestore
= tc
->readIntReg(NumIntArchRegs
+ 4);
441 IntReg Otherwin
= tc
->readIntReg(NumIntArchRegs
+ 6);
442 MiscReg CWP
= tc
->readMiscReg(MISCREG_CWP
);
443 MiscReg origCWP
= CWP
;
444 CWP
= (CWP
+ Cansave
+ 2) % NWindows
;
445 while (NWindows
- 2 - Cansave
!= 0) {
447 panic("Otherwin non-zero.\n");
449 tc
->setMiscReg(MISCREG_CWP
, CWP
);
451 IntReg sp
= tc
->readIntReg(StackPointerReg
);
452 for (int index
= 16; index
< 32; index
++) {
453 uint32_t regVal
= tc
->readIntReg(index
);
454 regVal
= htog(regVal
);
455 if (!tc
->getMemProxy().tryWriteBlob(
456 sp
+ (index
- 16) * 4, (uint8_t *)®Val
, 4)) {
457 warn("Failed to save register to the stack when "
458 "flushing windows.\n");
463 CWP
= (CWP
+ 1) % NWindows
;
466 tc
->setIntReg(NumIntArchRegs
+ 3, Cansave
);
467 tc
->setIntReg(NumIntArchRegs
+ 4, Canrestore
);
468 tc
->setMiscReg(MISCREG_CWP
, origCWP
);
472 Sparc64Process::flushWindows(ThreadContext
*tc
)
474 IntReg Cansave
= tc
->readIntReg(NumIntArchRegs
+ 3);
475 IntReg Canrestore
= tc
->readIntReg(NumIntArchRegs
+ 4);
476 IntReg Otherwin
= tc
->readIntReg(NumIntArchRegs
+ 6);
477 MiscReg CWP
= tc
->readMiscReg(MISCREG_CWP
);
478 MiscReg origCWP
= CWP
;
479 CWP
= (CWP
+ Cansave
+ 2) % NWindows
;
480 while (NWindows
- 2 - Cansave
!= 0) {
482 panic("Otherwin non-zero.\n");
484 tc
->setMiscReg(MISCREG_CWP
, CWP
);
486 IntReg sp
= tc
->readIntReg(StackPointerReg
);
487 for (int index
= 16; index
< 32; index
++) {
488 IntReg regVal
= tc
->readIntReg(index
);
489 regVal
= htog(regVal
);
490 if (!tc
->getMemProxy().tryWriteBlob(
491 sp
+ 2047 + (index
- 16) * 8, (uint8_t *)®Val
, 8)) {
492 warn("Failed to save register to the stack when "
493 "flushing windows.\n");
498 CWP
= (CWP
+ 1) % NWindows
;
501 tc
->setIntReg(NumIntArchRegs
+ 3, Cansave
);
502 tc
->setIntReg(NumIntArchRegs
+ 4, Canrestore
);
503 tc
->setMiscReg(MISCREG_CWP
, origCWP
);
507 Sparc32Process::getSyscallArg(ThreadContext
*tc
, int &i
)
510 return bits(tc
->readIntReg(FirstArgumentReg
+ i
++), 31, 0);
514 Sparc32Process::setSyscallArg(ThreadContext
*tc
, int i
, IntReg val
)
517 tc
->setIntReg(FirstArgumentReg
+ i
, bits(val
, 31, 0));
521 Sparc64Process::getSyscallArg(ThreadContext
*tc
, int &i
)
524 return tc
->readIntReg(FirstArgumentReg
+ i
++);
528 Sparc64Process::setSyscallArg(ThreadContext
*tc
, int i
, IntReg val
)
531 tc
->setIntReg(FirstArgumentReg
+ i
, val
);
535 SparcProcess::setSyscallReturn(ThreadContext
*tc
, SyscallReturn sysret
)
537 // check for error condition. SPARC syscall convention is to
538 // indicate success/failure in reg the carry bit of the ccr
539 // and put the return value itself in the standard return value reg ().
540 PSTATE pstate
= tc
->readMiscRegNoEffect(MISCREG_PSTATE
);
541 if (sysret
.successful()) {
542 // no error, clear XCC.C
543 tc
->setIntReg(NumIntArchRegs
+ 2,
544 tc
->readIntReg(NumIntArchRegs
+ 2) & 0xEE);
545 IntReg val
= sysret
.returnValue();
547 val
= bits(val
, 31, 0);
548 tc
->setIntReg(ReturnValueReg
, val
);
550 // got an error, set XCC.C
551 tc
->setIntReg(NumIntArchRegs
+ 2,
552 tc
->readIntReg(NumIntArchRegs
+ 2) | 0x11);
553 IntReg val
= sysret
.errnoValue();
555 val
= bits(val
, 31, 0);
556 tc
->setIntReg(ReturnValueReg
, val
);