2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
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14 * this software without specific prior written permission.
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32 #include "arch/sparc/process.hh"
34 #include "arch/sparc/asi.hh"
35 #include "arch/sparc/handlers.hh"
36 #include "arch/sparc/isa_traits.hh"
37 #include "arch/sparc/registers.hh"
38 #include "arch/sparc/types.hh"
39 #include "base/loader/elf_object.hh"
40 #include "base/loader/object_file.hh"
41 #include "base/logging.hh"
42 #include "cpu/thread_context.hh"
43 #include "debug/Stack.hh"
44 #include "mem/page_table.hh"
45 #include "params/Process.hh"
46 #include "sim/aux_vector.hh"
47 #include "sim/process_impl.hh"
48 #include "sim/syscall_return.hh"
49 #include "sim/system.hh"
52 using namespace SparcISA
;
54 static const int FirstArgumentReg
= 8;
57 SparcProcess::SparcProcess(ProcessParams
*params
, ObjectFile
*objFile
,
60 new EmulationPageTable(params
->name
, params
->pid
, PageBytes
),
64 fatal_if(params
->useArchPT
, "Arch page tables not implemented.");
65 // Initialize these to 0s
71 SparcProcess::handleTrap(int trapNum
, ThreadContext
*tc
, Fault
*fault
)
73 PCState pc
= tc
->pcState();
75 case 0x01: // Software breakpoint
76 warn("Software breakpoint encountered at pc %#x.\n", pc
.pc());
78 case 0x02: // Division by zero
79 warn("Software signaled a division by zero at pc %#x.\n", pc
.pc());
81 case 0x03: // Flush window trap
84 case 0x04: // Clean windows
85 warn("Ignoring process request for clean register "
86 "windows at pc %#x.\n", pc
.pc());
88 case 0x05: // Range check
89 warn("Software signaled a range check at pc %#x.\n", pc
.pc());
91 case 0x06: // Fix alignment
92 warn("Ignoring process request for os assisted unaligned accesses "
93 "at pc %#x.\n", pc
.pc());
95 case 0x07: // Integer overflow
96 warn("Software signaled an integer overflow at pc %#x.\n", pc
.pc());
98 case 0x32: // Get integer condition codes
99 warn("Ignoring process request to get the integer condition codes "
100 "at pc %#x.\n", pc
.pc());
102 case 0x33: // Set integer condition codes
103 warn("Ignoring process request to set the integer condition codes "
104 "at pc %#x.\n", pc
.pc());
107 panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum
);
112 SparcProcess::initState()
114 Process::initState();
116 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
117 // From the SPARC ABI
119 // Setup default FP state
120 tc
->setMiscRegNoEffect(MISCREG_FSR
, 0);
122 tc
->setMiscRegNoEffect(MISCREG_TICK
, 0);
125 * Register window management registers
128 // No windows contain info from other programs
129 // tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
130 tc
->setIntReg(NumIntArchRegs
+ 6, 0);
131 // There are no windows to pop
132 // tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
133 tc
->setIntReg(NumIntArchRegs
+ 4, 0);
134 // All windows are available to save into
135 // tc->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
136 tc
->setIntReg(NumIntArchRegs
+ 3, NWindows
- 2);
137 // All windows are "clean"
138 // tc->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
139 tc
->setIntReg(NumIntArchRegs
+ 5, NWindows
);
140 // Start with register window 0
141 tc
->setMiscReg(MISCREG_CWP
, 0);
142 // Always use spill and fill traps 0
143 // tc->setMiscRegNoEffect(MISCREG_WSTATE, 0);
144 tc
->setIntReg(NumIntArchRegs
+ 7, 0);
145 // Set the trap level to 0
146 tc
->setMiscRegNoEffect(MISCREG_TL
, 0);
147 // Set the ASI register to something fixed
148 tc
->setMiscReg(MISCREG_ASI
, ASI_PRIMARY
);
150 // Set the MMU Primary Context Register to hold the process' pid
151 tc
->setMiscReg(MISCREG_MMU_P_CONTEXT
, _pid
);
154 * T1 specific registers
156 // Turn on the icache, dcache, dtb translation, and itb translation.
157 tc
->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL
, 15);
161 Sparc32Process::initState()
163 SparcProcess::initState();
165 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
166 // The process runs in user mode with 32 bit addresses
170 tc
->setMiscReg(MISCREG_PSTATE
, pstate
);
172 argsInit(32 / 8, PageBytes
);
176 Sparc64Process::initState()
178 SparcProcess::initState();
180 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
181 // The process runs in user mode
184 tc
->setMiscReg(MISCREG_PSTATE
, pstate
);
186 argsInit(sizeof(IntReg
), PageBytes
);
189 template<class IntType
>
191 SparcProcess::argsInit(int pageSize
)
193 int intSize
= sizeof(IntType
);
195 typedef AuxVector
<IntType
> auxv_t
;
197 std::vector
<auxv_t
> auxv
;
205 // Even for a 32 bit process, the ABI says we still need to
206 // maintain double word alignment of the stack pointer.
209 // Patch the ld_bias for dynamic executables.
212 // load object file into target memory
213 objFile
->loadSections(initVirtMem
);
217 M5_HWCAP_SPARC_FLUSH
= 1,
218 M5_HWCAP_SPARC_STBAR
= 2,
219 M5_HWCAP_SPARC_SWAP
= 4,
220 M5_HWCAP_SPARC_MULDIV
= 8,
221 M5_HWCAP_SPARC_V9
= 16,
222 // This one should technically only be set
223 // if there is a cheetah or cheetah_plus tlb,
224 // but we'll use it all the time
225 M5_HWCAP_SPARC_ULTRA3
= 32
228 const int64_t hwcap
=
229 M5_HWCAP_SPARC_FLUSH
|
230 M5_HWCAP_SPARC_STBAR
|
231 M5_HWCAP_SPARC_SWAP
|
232 M5_HWCAP_SPARC_MULDIV
|
234 M5_HWCAP_SPARC_ULTRA3
;
236 // Setup the auxilliary vectors. These will already have endian conversion.
237 // Auxilliary vectors are loaded only for elf formatted executables.
238 ElfObject
* elfObject
= dynamic_cast<ElfObject
*>(objFile
);
240 // Bits which describe the system hardware capabilities
241 auxv
.push_back(auxv_t(M5_AT_HWCAP
, hwcap
));
242 // The system page size
243 auxv
.push_back(auxv_t(M5_AT_PAGESZ
, SparcISA::PageBytes
));
244 // Defined to be 100 in the kernel source.
245 // Frequency at which times() increments
246 auxv
.push_back(auxv_t(M5_AT_CLKTCK
, 100));
247 // For statically linked executables, this is the virtual address of the
248 // program header tables if they appear in the executable image
249 auxv
.push_back(auxv_t(M5_AT_PHDR
, elfObject
->programHeaderTable()));
250 // This is the size of a program header entry from the elf file.
251 auxv
.push_back(auxv_t(M5_AT_PHENT
, elfObject
->programHeaderSize()));
252 // This is the number of program headers from the original elf file.
253 auxv
.push_back(auxv_t(M5_AT_PHNUM
, elfObject
->programHeaderCount()));
254 // This is the base address of the ELF interpreter; it should be
255 // zero for static executables or contain the base address for
256 // dynamic executables.
257 auxv
.push_back(auxv_t(M5_AT_BASE
, getBias()));
258 // This is hardwired to 0 in the elf loading code in the kernel
259 auxv
.push_back(auxv_t(M5_AT_FLAGS
, 0));
260 // The entry point to the program
261 auxv
.push_back(auxv_t(M5_AT_ENTRY
, objFile
->entryPoint()));
262 // Different user and group IDs
263 auxv
.push_back(auxv_t(M5_AT_UID
, uid()));
264 auxv
.push_back(auxv_t(M5_AT_EUID
, euid()));
265 auxv
.push_back(auxv_t(M5_AT_GID
, gid()));
266 auxv
.push_back(auxv_t(M5_AT_EGID
, egid()));
267 // Whether to enable "secure mode" in the executable
268 auxv
.push_back(auxv_t(M5_AT_SECURE
, 0));
271 // Figure out how big the initial stack needs to be
273 // The unaccounted for 8 byte 0 at the top of the stack
276 // This is the name of the file which is present on the initial stack
277 // It's purpose is to let the user space linker examine the original file.
278 int file_name_size
= filename
.size() + 1;
280 int env_data_size
= 0;
281 for (int i
= 0; i
< envp
.size(); ++i
) {
282 env_data_size
+= envp
[i
].size() + 1;
284 int arg_data_size
= 0;
285 for (int i
= 0; i
< argv
.size(); ++i
) {
286 arg_data_size
+= argv
[i
].size() + 1;
290 int base_info_block_size
=
291 sentry_size
+ file_name_size
+ env_data_size
+ arg_data_size
;
293 int info_block_size
= roundUp(base_info_block_size
, align
);
295 int info_block_padding
= info_block_size
- base_info_block_size
;
297 // Each auxilliary vector is two words
298 int aux_array_size
= intSize
* 2 * (auxv
.size() + 1);
300 int envp_array_size
= intSize
* (envp
.size() + 1);
301 int argv_array_size
= intSize
* (argv
.size() + 1);
303 int argc_size
= intSize
;
304 int window_save_size
= intSize
* 16;
306 // Figure out the size of the contents of the actual initial frame
314 // There needs to be padding after the auxiliary vector data so that the
315 // very bottom of the stack is aligned properly.
316 int aligned_partial_size
= roundUp(frame_size
, align
);
317 int aux_padding
= aligned_partial_size
- frame_size
;
324 memState
->setStackMin(memState
->getStackBase() - space_needed
);
325 memState
->setStackMin(roundDown(memState
->getStackMin(), align
));
326 memState
->setStackSize(memState
->getStackBase() - memState
->getStackMin());
328 // Allocate space for the stack
329 allocateMem(roundDown(memState
->getStackMin(), pageSize
),
330 roundUp(memState
->getStackSize(), pageSize
));
332 // map out initial stack contents
333 IntType sentry_base
= memState
->getStackBase() - sentry_size
;
334 IntType file_name_base
= sentry_base
- file_name_size
;
335 IntType env_data_base
= file_name_base
- env_data_size
;
336 IntType arg_data_base
= env_data_base
- arg_data_size
;
337 IntType auxv_array_base
= arg_data_base
-
338 info_block_padding
- aux_array_size
- aux_padding
;
339 IntType envp_array_base
= auxv_array_base
- envp_array_size
;
340 IntType argv_array_base
= envp_array_base
- argv_array_size
;
341 IntType argc_base
= argv_array_base
- argc_size
;
343 IntType window_save_base
= argc_base
- window_save_size
;
346 DPRINTF(Stack
, "The addresses of items on the initial stack:\n");
347 DPRINTF(Stack
, "%#x - sentry NULL\n", sentry_base
);
348 DPRINTF(Stack
, "filename = %s\n", filename
);
349 DPRINTF(Stack
, "%#x - file name\n", file_name_base
);
350 DPRINTF(Stack
, "%#x - env data\n", env_data_base
);
351 DPRINTF(Stack
, "%#x - arg data\n", arg_data_base
);
352 DPRINTF(Stack
, "%#x - auxv array\n", auxv_array_base
);
353 DPRINTF(Stack
, "%#x - envp array\n", envp_array_base
);
354 DPRINTF(Stack
, "%#x - argv array\n", argv_array_base
);
355 DPRINTF(Stack
, "%#x - argc \n", argc_base
);
356 DPRINTF(Stack
, "%#x - window save\n", window_save_base
);
357 DPRINTF(Stack
, "%#x - stack min\n", memState
->getStackMin());
359 assert(window_save_base
== memState
->getStackMin());
361 // write contents to stack
364 IntType argc
= argv
.size();
365 IntType guestArgc
= SparcISA::htog(argc
);
367 // Write out the sentry void *
368 uint64_t sentry_NULL
= 0;
369 initVirtMem
.writeBlob(sentry_base
,
370 (uint8_t*)&sentry_NULL
, sentry_size
);
372 // Write the file name
373 initVirtMem
.writeString(file_name_base
, filename
.c_str());
375 // Copy the aux stuff
376 for (int x
= 0; x
< auxv
.size(); x
++) {
377 initVirtMem
.writeBlob(auxv_array_base
+ x
* 2 * intSize
,
378 (uint8_t*)&(auxv
[x
].a_type
), intSize
);
379 initVirtMem
.writeBlob(auxv_array_base
+ (x
* 2 + 1) * intSize
,
380 (uint8_t*)&(auxv
[x
].a_val
), intSize
);
383 // Write out the terminating zeroed auxilliary vector
384 const IntType zero
= 0;
385 initVirtMem
.writeBlob(auxv_array_base
+ intSize
* 2 * auxv
.size(),
386 (uint8_t*)&zero
, intSize
);
387 initVirtMem
.writeBlob(auxv_array_base
+ intSize
* (2 * auxv
.size() + 1),
388 (uint8_t*)&zero
, intSize
);
390 copyStringArray(envp
, envp_array_base
, env_data_base
, initVirtMem
);
391 copyStringArray(argv
, argv_array_base
, arg_data_base
, initVirtMem
);
393 initVirtMem
.writeBlob(argc_base
, (uint8_t*)&guestArgc
, intSize
);
395 // Set up space for the trap handlers into the processes address space.
396 // Since the stack grows down and there is reserved address space abov
397 // it, we can put stuff above it and stay out of the way.
398 fillStart
= memState
->getStackBase();
399 spillStart
= fillStart
+ sizeof(MachInst
) * numFillInsts
;
401 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
402 // Set up the thread context to start running the process
403 // assert(NumArgumentRegs >= 2);
404 // tc->setIntReg(ArgumentReg[0], argc);
405 // tc->setIntReg(ArgumentReg[1], argv_array_base);
406 tc
->setIntReg(StackPointerReg
, memState
->getStackMin() - StackBias
);
408 // %g1 is a pointer to a function that should be run at exit. Since we
409 // don't have anything like that, it should be set to 0.
412 tc
->pcState(getStartPC());
414 // Align the "stack_min" to a page boundary.
415 memState
->setStackMin(roundDown(memState
->getStackMin(), pageSize
));
419 Sparc64Process::argsInit(int intSize
, int pageSize
)
421 SparcProcess::argsInit
<uint64_t>(pageSize
);
423 // Stuff the trap handlers into the process address space
424 initVirtMem
.writeBlob(fillStart
,
425 (uint8_t*)fillHandler64
, sizeof(MachInst
) * numFillInsts
);
426 initVirtMem
.writeBlob(spillStart
,
427 (uint8_t*)spillHandler64
, sizeof(MachInst
) * numSpillInsts
);
431 Sparc32Process::argsInit(int intSize
, int pageSize
)
433 SparcProcess::argsInit
<uint32_t>(pageSize
);
435 // Stuff the trap handlers into the process address space
436 initVirtMem
.writeBlob(fillStart
,
437 (uint8_t*)fillHandler32
, sizeof(MachInst
) * numFillInsts
);
438 initVirtMem
.writeBlob(spillStart
,
439 (uint8_t*)spillHandler32
, sizeof(MachInst
) * numSpillInsts
);
442 void Sparc32Process::flushWindows(ThreadContext
*tc
)
444 IntReg Cansave
= tc
->readIntReg(NumIntArchRegs
+ 3);
445 IntReg Canrestore
= tc
->readIntReg(NumIntArchRegs
+ 4);
446 IntReg Otherwin
= tc
->readIntReg(NumIntArchRegs
+ 6);
447 MiscReg CWP
= tc
->readMiscReg(MISCREG_CWP
);
448 MiscReg origCWP
= CWP
;
449 CWP
= (CWP
+ Cansave
+ 2) % NWindows
;
450 while (NWindows
- 2 - Cansave
!= 0) {
452 panic("Otherwin non-zero.\n");
454 tc
->setMiscReg(MISCREG_CWP
, CWP
);
456 IntReg sp
= tc
->readIntReg(StackPointerReg
);
457 for (int index
= 16; index
< 32; index
++) {
458 uint32_t regVal
= tc
->readIntReg(index
);
459 regVal
= htog(regVal
);
460 if (!tc
->getMemProxy().tryWriteBlob(
461 sp
+ (index
- 16) * 4, (uint8_t *)®Val
, 4)) {
462 warn("Failed to save register to the stack when "
463 "flushing windows.\n");
468 CWP
= (CWP
+ 1) % NWindows
;
471 tc
->setIntReg(NumIntArchRegs
+ 3, Cansave
);
472 tc
->setIntReg(NumIntArchRegs
+ 4, Canrestore
);
473 tc
->setMiscReg(MISCREG_CWP
, origCWP
);
477 Sparc64Process::flushWindows(ThreadContext
*tc
)
479 IntReg Cansave
= tc
->readIntReg(NumIntArchRegs
+ 3);
480 IntReg Canrestore
= tc
->readIntReg(NumIntArchRegs
+ 4);
481 IntReg Otherwin
= tc
->readIntReg(NumIntArchRegs
+ 6);
482 MiscReg CWP
= tc
->readMiscReg(MISCREG_CWP
);
483 MiscReg origCWP
= CWP
;
484 CWP
= (CWP
+ Cansave
+ 2) % NWindows
;
485 while (NWindows
- 2 - Cansave
!= 0) {
487 panic("Otherwin non-zero.\n");
489 tc
->setMiscReg(MISCREG_CWP
, CWP
);
491 IntReg sp
= tc
->readIntReg(StackPointerReg
);
492 for (int index
= 16; index
< 32; index
++) {
493 IntReg regVal
= tc
->readIntReg(index
);
494 regVal
= htog(regVal
);
495 if (!tc
->getMemProxy().tryWriteBlob(
496 sp
+ 2047 + (index
- 16) * 8, (uint8_t *)®Val
, 8)) {
497 warn("Failed to save register to the stack when "
498 "flushing windows.\n");
503 CWP
= (CWP
+ 1) % NWindows
;
506 tc
->setIntReg(NumIntArchRegs
+ 3, Cansave
);
507 tc
->setIntReg(NumIntArchRegs
+ 4, Canrestore
);
508 tc
->setMiscReg(MISCREG_CWP
, origCWP
);
512 Sparc32Process::getSyscallArg(ThreadContext
*tc
, int &i
)
515 return bits(tc
->readIntReg(FirstArgumentReg
+ i
++), 31, 0);
519 Sparc32Process::setSyscallArg(ThreadContext
*tc
, int i
, IntReg val
)
522 tc
->setIntReg(FirstArgumentReg
+ i
, bits(val
, 31, 0));
526 Sparc64Process::getSyscallArg(ThreadContext
*tc
, int &i
)
529 return tc
->readIntReg(FirstArgumentReg
+ i
++);
533 Sparc64Process::setSyscallArg(ThreadContext
*tc
, int i
, IntReg val
)
536 tc
->setIntReg(FirstArgumentReg
+ i
, val
);
540 SparcProcess::setSyscallReturn(ThreadContext
*tc
, SyscallReturn sysret
)
542 // check for error condition. SPARC syscall convention is to
543 // indicate success/failure in reg the carry bit of the ccr
544 // and put the return value itself in the standard return value reg ().
545 PSTATE pstate
= tc
->readMiscRegNoEffect(MISCREG_PSTATE
);
546 if (sysret
.successful()) {
547 // no error, clear XCC.C
548 tc
->setIntReg(NumIntArchRegs
+ 2,
549 tc
->readIntReg(NumIntArchRegs
+ 2) & 0xEE);
550 IntReg val
= sysret
.returnValue();
552 val
= bits(val
, 31, 0);
553 tc
->setIntReg(ReturnValueReg
, val
);
555 // got an error, set XCC.C
556 tc
->setIntReg(NumIntArchRegs
+ 2,
557 tc
->readIntReg(NumIntArchRegs
+ 2) | 0x11);
558 IntReg val
= sysret
.errnoValue();
560 val
= bits(val
, 31, 0);
561 tc
->setIntReg(ReturnValueReg
, val
);