2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 #include "arch/sparc/asi.hh"
33 #include "arch/sparc/handlers.hh"
34 #include "arch/sparc/isa_traits.hh"
35 #include "arch/sparc/process.hh"
36 #include "arch/sparc/types.hh"
37 #include "base/loader/object_file.hh"
38 #include "base/loader/elf_object.hh"
39 #include "base/misc.hh"
40 #include "cpu/thread_context.hh"
41 #include "mem/page_table.hh"
42 #include "sim/process_impl.hh"
43 #include "mem/translating_port.hh"
44 #include "sim/system.hh"
47 using namespace SparcISA
;
50 SparcLiveProcess::SparcLiveProcess(LiveProcessParams
* params
,
52 : LiveProcess(params
, objFile
)
55 // XXX all the below need to be updated for SPARC - Ali
56 brk_point
= objFile
->dataBase() + objFile
->dataSize() + objFile
->bssSize();
57 brk_point
= roundUp(brk_point
, VMPageSize
);
59 // Set pointer for next thread stack. Reserve 8M for main stack.
60 next_thread_stack_base
= stack_base
- (8 * 1024 * 1024);
62 //Initialize these to 0s
67 void SparcLiveProcess::handleTrap(int trapNum
, ThreadContext
*tc
)
71 case 0x01: //Software breakpoint
72 warn("Software breakpoint encountered at pc %#x.\n", tc
->readPC());
74 case 0x02: //Division by zero
75 warn("Software signaled a division by zero at pc %#x.\n",
78 case 0x03: //Flush window trap
81 case 0x04: //Clean windows
82 warn("Ignoring process request for clean register "
83 "windows at pc %#x.\n", tc
->readPC());
85 case 0x05: //Range check
86 warn("Software signaled a range check at pc %#x.\n",
89 case 0x06: //Fix alignment
90 warn("Ignoring process request for os assisted unaligned accesses "
91 "at pc %#x.\n", tc
->readPC());
93 case 0x07: //Integer overflow
94 warn("Software signaled an integer overflow at pc %#x.\n",
97 case 0x32: //Get integer condition codes
98 warn("Ignoring process request to get the integer condition codes "
99 "at pc %#x.\n", tc
->readPC());
101 case 0x33: //Set integer condition codes
102 warn("Ignoring process request to set the integer condition codes "
103 "at pc %#x.\n", tc
->readPC());
106 panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum
);
111 Sparc32LiveProcess::startup()
113 if (checkpointRestored
)
116 argsInit(32 / 8, VMPageSize
);
120 //The process runs in user mode with 32 bit addresses
121 threadContexts
[0]->setMiscReg(MISCREG_PSTATE
, 0x0a);
123 //Setup default FP state
124 threadContexts
[0]->setMiscRegNoEffect(MISCREG_FSR
, 0);
126 threadContexts
[0]->setMiscRegNoEffect(MISCREG_TICK
, 0);
129 * Register window management registers
132 //No windows contain info from other programs
133 //threadContexts[0]->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
134 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 6, 0);
135 //There are no windows to pop
136 //threadContexts[0]->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
137 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 4, 0);
138 //All windows are available to save into
139 //threadContexts[0]->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
140 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 3, NWindows
- 2);
141 //All windows are "clean"
142 //threadContexts[0]->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
143 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 5, NWindows
);
144 //Start with register window 0
145 threadContexts
[0]->setMiscRegNoEffect(MISCREG_CWP
, 0);
146 //Always use spill and fill traps 0
147 //threadContexts[0]->setMiscRegNoEffect(MISCREG_WSTATE, 0);
148 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 7, 0);
149 //Set the trap level to 0
150 threadContexts
[0]->setMiscRegNoEffect(MISCREG_TL
, 0);
151 //Set the ASI register to something fixed
152 threadContexts
[0]->setMiscRegNoEffect(MISCREG_ASI
, ASI_PRIMARY
);
155 * T1 specific registers
157 //Turn on the icache, dcache, dtb translation, and itb translation.
158 threadContexts
[0]->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL
, 15);
162 Sparc64LiveProcess::startup()
164 argsInit(sizeof(IntReg
), VMPageSize
);
168 //The process runs in user mode
169 threadContexts
[0]->setMiscReg(MISCREG_PSTATE
, 0x02);
171 //Setup default FP state
172 threadContexts
[0]->setMiscRegNoEffect(MISCREG_FSR
, 0);
174 threadContexts
[0]->setMiscRegNoEffect(MISCREG_TICK
, 0);
177 * Register window management registers
180 //No windows contain info from other programs
181 //threadContexts[0]->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
182 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 6, 0);
183 //There are no windows to pop
184 //threadContexts[0]->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
185 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 4, 0);
186 //All windows are available to save into
187 //threadContexts[0]->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
188 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 3, NWindows
- 2);
189 //All windows are "clean"
190 //threadContexts[0]->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
191 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 5, NWindows
);
192 //Start with register window 0
193 threadContexts
[0]->setMiscRegNoEffect(MISCREG_CWP
, 0);
194 //Always use spill and fill traps 0
195 //threadContexts[0]->setMiscRegNoEffect(MISCREG_WSTATE, 0);
196 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 7, 0);
197 //Set the trap level to 0
198 threadContexts
[0]->setMiscRegNoEffect(MISCREG_TL
, 0);
199 //Set the ASI register to something fixed
200 threadContexts
[0]->setMiscRegNoEffect(MISCREG_ASI
, ASI_PRIMARY
);
203 * T1 specific registers
205 //Turn on the icache, dcache, dtb translation, and itb translation.
206 threadContexts
[0]->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL
, 15);
209 M5_32_auxv_t::M5_32_auxv_t(int32_t type
, int32_t val
)
211 a_type
= TheISA::htog(type
);
212 a_val
= TheISA::htog(val
);
215 M5_64_auxv_t::M5_64_auxv_t(int64_t type
, int64_t val
)
217 a_type
= TheISA::htog(type
);
218 a_val
= TheISA::htog(val
);
222 Sparc64LiveProcess::argsInit(int intSize
, int pageSize
)
224 typedef M5_64_auxv_t auxv_t
;
233 Addr alignmentMask
= ~(intSize
- 1);
235 // load object file into target memory
236 objFile
->loadSections(initVirtMem
);
240 M5_HWCAP_SPARC_FLUSH
= 1,
241 M5_HWCAP_SPARC_STBAR
= 2,
242 M5_HWCAP_SPARC_SWAP
= 4,
243 M5_HWCAP_SPARC_MULDIV
= 8,
244 M5_HWCAP_SPARC_V9
= 16,
245 //This one should technically only be set
246 //if there is a cheetah or cheetah_plus tlb,
247 //but we'll use it all the time
248 M5_HWCAP_SPARC_ULTRA3
= 32
251 const int64_t hwcap
=
252 M5_HWCAP_SPARC_FLUSH
|
253 M5_HWCAP_SPARC_STBAR
|
254 M5_HWCAP_SPARC_SWAP
|
255 M5_HWCAP_SPARC_MULDIV
|
257 M5_HWCAP_SPARC_ULTRA3
;
260 //Setup the auxilliary vectors. These will already have endian conversion.
261 //Auxilliary vectors are loaded only for elf formatted executables.
262 ElfObject
* elfObject
= dynamic_cast<ElfObject
*>(objFile
);
265 //Bits which describe the system hardware capabilities
266 auxv
.push_back(auxv_t(M5_AT_HWCAP
, hwcap
));
267 //The system page size
268 auxv
.push_back(auxv_t(M5_AT_PAGESZ
, SparcISA::VMPageSize
));
269 //Defined to be 100 in the kernel source.
270 //Frequency at which times() increments
271 auxv
.push_back(auxv_t(M5_AT_CLKTCK
, 100));
272 // For statically linked executables, this is the virtual address of the
273 // program header tables if they appear in the executable image
274 auxv
.push_back(auxv_t(M5_AT_PHDR
, elfObject
->programHeaderTable()));
275 // This is the size of a program header entry from the elf file.
276 auxv
.push_back(auxv_t(M5_AT_PHENT
, elfObject
->programHeaderSize()));
277 // This is the number of program headers from the original elf file.
278 auxv
.push_back(auxv_t(M5_AT_PHNUM
, elfObject
->programHeaderCount()));
279 //This is the address of the elf "interpreter", It should be set
280 //to 0 for regular executables. It should be something else
281 //(not sure what) for dynamic libraries.
282 auxv
.push_back(auxv_t(M5_AT_BASE
, 0));
283 //This is hardwired to 0 in the elf loading code in the kernel
284 auxv
.push_back(auxv_t(M5_AT_FLAGS
, 0));
285 //The entry point to the program
286 auxv
.push_back(auxv_t(M5_AT_ENTRY
, objFile
->entryPoint()));
287 //Different user and group IDs
288 auxv
.push_back(auxv_t(M5_AT_UID
, uid()));
289 auxv
.push_back(auxv_t(M5_AT_EUID
, euid()));
290 auxv
.push_back(auxv_t(M5_AT_GID
, gid()));
291 auxv
.push_back(auxv_t(M5_AT_EGID
, egid()));
292 //Whether to enable "secure mode" in the executable
293 auxv
.push_back(auxv_t(M5_AT_SECURE
, 0));
296 //Figure out how big the initial stack needs to be
298 // The unaccounted for 0 at the top of the stack
299 int mysterious_size
= intSize
;
301 //This is the name of the file which is present on the initial stack
302 //It's purpose is to let the user space linker examine the original file.
303 int file_name_size
= filename
.size() + 1;
305 int env_data_size
= 0;
306 for (int i
= 0; i
< envp
.size(); ++i
) {
307 env_data_size
+= envp
[i
].size() + 1;
309 int arg_data_size
= 0;
310 for (int i
= 0; i
< argv
.size(); ++i
) {
311 arg_data_size
+= argv
[i
].size() + 1;
314 //The info_block needs to be padded so it's size is a multiple of the
315 //alignment mask. Also, it appears that there needs to be at least some
316 //padding, so if the size is already a multiple, we need to increase it
318 int info_block_size
=
322 intSize
) & alignmentMask
;
324 int info_block_padding
=
330 //Each auxilliary vector is two 8 byte words
331 int aux_array_size
= intSize
* 2 * (auxv
.size() + 1);
333 int envp_array_size
= intSize
* (envp
.size() + 1);
334 int argv_array_size
= intSize
* (argv
.size() + 1);
336 int argc_size
= intSize
;
337 int window_save_size
= intSize
* 16;
348 stack_min
= stack_base
- space_needed
;
349 stack_min
&= alignmentMask
;
350 stack_size
= stack_base
- stack_min
;
353 pTable
->allocate(roundDown(stack_min
, pageSize
),
354 roundUp(stack_size
, pageSize
));
356 // map out initial stack contents
357 Addr mysterious_base
= stack_base
- mysterious_size
;
358 Addr file_name_base
= mysterious_base
- file_name_size
;
359 Addr env_data_base
= file_name_base
- env_data_size
;
360 Addr arg_data_base
= env_data_base
- arg_data_size
;
361 Addr auxv_array_base
= arg_data_base
- aux_array_size
- info_block_padding
;
362 Addr envp_array_base
= auxv_array_base
- envp_array_size
;
363 Addr argv_array_base
= envp_array_base
- argv_array_size
;
364 Addr argc_base
= argv_array_base
- argc_size
;
366 // only used in DPRINTF
367 Addr window_save_base
= argc_base
- window_save_size
;
370 DPRINTF(Sparc
, "The addresses of items on the initial stack:\n");
371 DPRINTF(Sparc
, "0x%x - file name\n", file_name_base
);
372 DPRINTF(Sparc
, "0x%x - env data\n", env_data_base
);
373 DPRINTF(Sparc
, "0x%x - arg data\n", arg_data_base
);
374 DPRINTF(Sparc
, "0x%x - auxv array\n", auxv_array_base
);
375 DPRINTF(Sparc
, "0x%x - envp array\n", envp_array_base
);
376 DPRINTF(Sparc
, "0x%x - argv array\n", argv_array_base
);
377 DPRINTF(Sparc
, "0x%x - argc \n", argc_base
);
378 DPRINTF(Sparc
, "0x%x - window save\n", window_save_base
);
379 DPRINTF(Sparc
, "0x%x - stack min\n", stack_min
);
381 // write contents to stack
384 uint64_t argc
= argv
.size();
385 uint64_t guestArgc
= TheISA::htog(argc
);
387 //Write out the mysterious 0
388 uint64_t mysterious_zero
= 0;
389 initVirtMem
->writeBlob(mysterious_base
,
390 (uint8_t*)&mysterious_zero
, mysterious_size
);
392 //Write the file name
393 initVirtMem
->writeString(file_name_base
, filename
.c_str());
396 for(int x
= 0; x
< auxv
.size(); x
++)
398 initVirtMem
->writeBlob(auxv_array_base
+ x
* 2 * intSize
,
399 (uint8_t*)&(auxv
[x
].a_type
), intSize
);
400 initVirtMem
->writeBlob(auxv_array_base
+ (x
* 2 + 1) * intSize
,
401 (uint8_t*)&(auxv
[x
].a_val
), intSize
);
403 //Write out the terminating zeroed auxilliary vector
404 const uint64_t zero
= 0;
405 initVirtMem
->writeBlob(auxv_array_base
+ 2 * intSize
* auxv
.size(),
406 (uint8_t*)&zero
, 2 * intSize
);
408 copyStringArray(envp
, envp_array_base
, env_data_base
, initVirtMem
);
409 copyStringArray(argv
, argv_array_base
, arg_data_base
, initVirtMem
);
411 initVirtMem
->writeBlob(argc_base
, (uint8_t*)&guestArgc
, intSize
);
413 //Stuff the trap handlers into the processes address space.
414 //Since the stack grows down and is the highest area in the processes
415 //address space, we can put stuff above it and stay out of the way.
416 int fillSize
= sizeof(MachInst
) * numFillInsts
;
417 int spillSize
= sizeof(MachInst
) * numSpillInsts
;
418 fillStart
= stack_base
;
419 spillStart
= fillStart
+ fillSize
;
420 initVirtMem
->writeBlob(fillStart
, (uint8_t*)fillHandler64
, fillSize
);
421 initVirtMem
->writeBlob(spillStart
, (uint8_t*)spillHandler64
, spillSize
);
423 //Set up the thread context to start running the process
424 assert(NumArgumentRegs
>= 2);
425 threadContexts
[0]->setIntReg(ArgumentReg
[0], argc
);
426 threadContexts
[0]->setIntReg(ArgumentReg
[1], argv_array_base
);
427 threadContexts
[0]->setIntReg(StackPointerReg
, stack_min
- StackBias
);
429 Addr prog_entry
= objFile
->entryPoint();
430 threadContexts
[0]->setPC(prog_entry
);
431 threadContexts
[0]->setNextPC(prog_entry
+ sizeof(MachInst
));
432 threadContexts
[0]->setNextNPC(prog_entry
+ (2 * sizeof(MachInst
)));
434 //Align the "stack_min" to a page boundary.
435 stack_min
= roundDown(stack_min
, pageSize
);
441 Sparc32LiveProcess::argsInit(int intSize
, int pageSize
)
443 typedef M5_32_auxv_t auxv_t
;
452 //Even though this is a 32 bit process, the ABI says we still need to
453 //maintain double word alignment of the stack pointer.
454 Addr alignmentMask
= ~(8 - 1);
456 // load object file into target memory
457 objFile
->loadSections(initVirtMem
);
459 //These are the auxilliary vector types
464 SPARC_AT_CLKTCK
= 17,
480 M5_HWCAP_SPARC_FLUSH
= 1,
481 M5_HWCAP_SPARC_STBAR
= 2,
482 M5_HWCAP_SPARC_SWAP
= 4,
483 M5_HWCAP_SPARC_MULDIV
= 8,
484 M5_HWCAP_SPARC_V9
= 16,
485 //This one should technically only be set
486 //if there is a cheetah or cheetah_plus tlb,
487 //but we'll use it all the time
488 M5_HWCAP_SPARC_ULTRA3
= 32
491 const int64_t hwcap
=
492 M5_HWCAP_SPARC_FLUSH
|
493 M5_HWCAP_SPARC_STBAR
|
494 M5_HWCAP_SPARC_SWAP
|
495 M5_HWCAP_SPARC_MULDIV
|
497 M5_HWCAP_SPARC_ULTRA3
;
500 //Setup the auxilliary vectors. These will already have endian conversion.
501 //Auxilliary vectors are loaded only for elf formatted executables.
502 ElfObject
* elfObject
= dynamic_cast<ElfObject
*>(objFile
);
505 //Bits which describe the system hardware capabilities
506 auxv
.push_back(auxv_t(SPARC_AT_HWCAP
, hwcap
));
507 //The system page size
508 auxv
.push_back(auxv_t(SPARC_AT_PAGESZ
, SparcISA::VMPageSize
));
509 //Defined to be 100 in the kernel source.
510 //Frequency at which times() increments
511 auxv
.push_back(auxv_t(SPARC_AT_CLKTCK
, 100));
512 // For statically linked executables, this is the virtual address of the
513 // program header tables if they appear in the executable image
514 auxv
.push_back(auxv_t(SPARC_AT_PHDR
, elfObject
->programHeaderTable()));
515 // This is the size of a program header entry from the elf file.
516 auxv
.push_back(auxv_t(SPARC_AT_PHENT
, elfObject
->programHeaderSize()));
517 // This is the number of program headers from the original elf file.
518 auxv
.push_back(auxv_t(SPARC_AT_PHNUM
, elfObject
->programHeaderCount()));
519 //This is the address of the elf "interpreter", It should be set
520 //to 0 for regular executables. It should be something else
521 //(not sure what) for dynamic libraries.
522 auxv
.push_back(auxv_t(SPARC_AT_BASE
, 0));
523 //This is hardwired to 0 in the elf loading code in the kernel
524 auxv
.push_back(auxv_t(SPARC_AT_FLAGS
, 0));
525 //The entry point to the program
526 auxv
.push_back(auxv_t(SPARC_AT_ENTRY
, objFile
->entryPoint()));
527 //Different user and group IDs
528 auxv
.push_back(auxv_t(SPARC_AT_UID
, uid()));
529 auxv
.push_back(auxv_t(SPARC_AT_EUID
, euid()));
530 auxv
.push_back(auxv_t(SPARC_AT_GID
, gid()));
531 auxv
.push_back(auxv_t(SPARC_AT_EGID
, egid()));
532 //Whether to enable "secure mode" in the executable
533 auxv
.push_back(auxv_t(SPARC_AT_SECURE
, 0));
536 //Figure out how big the initial stack needs to be
538 // The unaccounted for 8 byte 0 at the top of the stack
539 int mysterious_size
= 8;
541 //This is the name of the file which is present on the initial stack
542 //It's purpose is to let the user space linker examine the original file.
543 int file_name_size
= filename
.size() + 1;
545 int env_data_size
= 0;
546 for (int i
= 0; i
< envp
.size(); ++i
) {
547 env_data_size
+= envp
[i
].size() + 1;
549 int arg_data_size
= 0;
550 for (int i
= 0; i
< argv
.size(); ++i
) {
551 arg_data_size
+= argv
[i
].size() + 1;
554 //The info_block - This seems to need an pad for some reason.
555 int info_block_size
=
559 arg_data_size
+ intSize
);
561 //Each auxilliary vector is two 4 byte words
562 int aux_array_size
= intSize
* 2 * (auxv
.size() + 1);
564 int envp_array_size
= intSize
* (envp
.size() + 1);
565 int argv_array_size
= intSize
* (argv
.size() + 1);
567 int argc_size
= intSize
;
568 int window_save_size
= intSize
* 16;
578 stack_min
= stack_base
- space_needed
;
579 stack_min
&= alignmentMask
;
580 stack_size
= stack_base
- stack_min
;
583 pTable
->allocate(roundDown(stack_min
, pageSize
),
584 roundUp(stack_size
, pageSize
));
586 // map out initial stack contents
587 uint32_t window_save_base
= stack_min
;
588 uint32_t argc_base
= window_save_base
+ window_save_size
;
589 uint32_t argv_array_base
= argc_base
+ argc_size
;
590 uint32_t envp_array_base
= argv_array_base
+ argv_array_size
;
591 uint32_t auxv_array_base
= envp_array_base
+ envp_array_size
;
592 //The info block is pushed up against the top of the stack, while
593 //the rest of the initial stack frame is aligned to an 8 byte boudary.
594 uint32_t arg_data_base
= stack_base
- info_block_size
+ intSize
;
595 uint32_t env_data_base
= arg_data_base
+ arg_data_size
;
596 uint32_t file_name_base
= env_data_base
+ env_data_size
;
597 uint32_t mysterious_base
= file_name_base
+ file_name_size
;
599 DPRINTF(Sparc
, "The addresses of items on the initial stack:\n");
600 DPRINTF(Sparc
, "0x%x - file name\n", file_name_base
);
601 DPRINTF(Sparc
, "0x%x - env data\n", env_data_base
);
602 DPRINTF(Sparc
, "0x%x - arg data\n", arg_data_base
);
603 DPRINTF(Sparc
, "0x%x - auxv array\n", auxv_array_base
);
604 DPRINTF(Sparc
, "0x%x - envp array\n", envp_array_base
);
605 DPRINTF(Sparc
, "0x%x - argv array\n", argv_array_base
);
606 DPRINTF(Sparc
, "0x%x - argc \n", argc_base
);
607 DPRINTF(Sparc
, "0x%x - window save\n", window_save_base
);
608 DPRINTF(Sparc
, "0x%x - stack min\n", stack_min
);
610 // write contents to stack
613 uint32_t argc
= argv
.size();
614 uint32_t guestArgc
= TheISA::htog(argc
);
616 //Write out the mysterious 0
617 uint64_t mysterious_zero
= 0;
618 initVirtMem
->writeBlob(mysterious_base
,
619 (uint8_t*)&mysterious_zero
, mysterious_size
);
621 //Write the file name
622 initVirtMem
->writeString(file_name_base
, filename
.c_str());
625 for(int x
= 0; x
< auxv
.size(); x
++)
627 initVirtMem
->writeBlob(auxv_array_base
+ x
* 2 * intSize
,
628 (uint8_t*)&(auxv
[x
].a_type
), intSize
);
629 initVirtMem
->writeBlob(auxv_array_base
+ (x
* 2 + 1) * intSize
,
630 (uint8_t*)&(auxv
[x
].a_val
), intSize
);
632 //Write out the terminating zeroed auxilliary vector
633 const uint64_t zero
= 0;
634 initVirtMem
->writeBlob(auxv_array_base
+ 2 * intSize
* auxv
.size(),
635 (uint8_t*)&zero
, 2 * intSize
);
637 copyStringArray(envp
, envp_array_base
, env_data_base
, initVirtMem
);
638 copyStringArray(argv
, argv_array_base
, arg_data_base
, initVirtMem
);
640 initVirtMem
->writeBlob(argc_base
, (uint8_t*)&guestArgc
, intSize
);
642 //Stuff the trap handlers into the processes address space.
643 //Since the stack grows down and is the highest area in the processes
644 //address space, we can put stuff above it and stay out of the way.
645 int fillSize
= sizeof(MachInst
) * numFillInsts
;
646 int spillSize
= sizeof(MachInst
) * numSpillInsts
;
647 fillStart
= stack_base
;
648 spillStart
= fillStart
+ fillSize
;
649 initVirtMem
->writeBlob(fillStart
, (uint8_t*)fillHandler32
, fillSize
);
650 initVirtMem
->writeBlob(spillStart
, (uint8_t*)spillHandler32
, spillSize
);
652 //Set up the thread context to start running the process
653 //assert(NumArgumentRegs >= 2);
654 //threadContexts[0]->setIntReg(ArgumentReg[0], argc);
655 //threadContexts[0]->setIntReg(ArgumentReg[1], argv_array_base);
656 threadContexts
[0]->setIntReg(StackPointerReg
, stack_min
);
658 uint32_t prog_entry
= objFile
->entryPoint();
659 threadContexts
[0]->setPC(prog_entry
);
660 threadContexts
[0]->setNextPC(prog_entry
+ sizeof(MachInst
));
661 threadContexts
[0]->setNextNPC(prog_entry
+ (2 * sizeof(MachInst
)));
663 //Align the "stack_min" to a page boundary.
664 stack_min
= roundDown(stack_min
, pageSize
);
669 void Sparc32LiveProcess::flushWindows(ThreadContext
*tc
)
671 IntReg Cansave
= tc
->readIntReg(NumIntArchRegs
+ 3);
672 IntReg Canrestore
= tc
->readIntReg(NumIntArchRegs
+ 4);
673 IntReg Otherwin
= tc
->readIntReg(NumIntArchRegs
+ 6);
674 MiscReg CWP
= tc
->readMiscReg(MISCREG_CWP
);
675 MiscReg origCWP
= CWP
;
676 CWP
= (CWP
+ Cansave
+ 2) % NWindows
;
677 while(NWindows
- 2 - Cansave
!= 0)
680 panic("Otherwin non-zero.\n");
682 tc
->setMiscReg(MISCREG_CWP
, CWP
);
684 IntReg sp
= tc
->readIntReg(StackPointerReg
);
685 for (int index
= 16; index
< 32; index
++) {
686 IntReg regVal
= tc
->readIntReg(index
);
687 regVal
= htog(regVal
);
688 if (!tc
->getMemPort()->tryWriteBlob(
689 sp
+ (index
- 16) * 4, (uint8_t *)®Val
, 4)) {
690 warn("Failed to save register to the stack when "
691 "flushing windows.\n");
696 CWP
= (CWP
+ 1) % NWindows
;
699 tc
->setIntReg(NumIntArchRegs
+ 3, Cansave
);
700 tc
->setIntReg(NumIntArchRegs
+ 4, Canrestore
);
701 tc
->setMiscReg(MISCREG_CWP
, origCWP
);
704 void Sparc64LiveProcess::flushWindows(ThreadContext
*tc
)
706 IntReg Cansave
= tc
->readIntReg(NumIntArchRegs
+ 3);
707 IntReg Canrestore
= tc
->readIntReg(NumIntArchRegs
+ 4);
708 IntReg Otherwin
= tc
->readIntReg(NumIntArchRegs
+ 6);
709 MiscReg CWP
= tc
->readMiscReg(MISCREG_CWP
);
710 MiscReg origCWP
= CWP
;
711 CWP
= (CWP
+ Cansave
+ 2) % NWindows
;
712 while(NWindows
- 2 - Cansave
!= 0)
715 panic("Otherwin non-zero.\n");
717 tc
->setMiscReg(MISCREG_CWP
, CWP
);
719 IntReg sp
= tc
->readIntReg(StackPointerReg
);
720 for (int index
= 16; index
< 32; index
++) {
721 IntReg regVal
= tc
->readIntReg(index
);
722 regVal
= htog(regVal
);
723 if (!tc
->getMemPort()->tryWriteBlob(
724 sp
+ 2047 + (index
- 16) * 8, (uint8_t *)®Val
, 8)) {
725 warn("Failed to save register to the stack when "
726 "flushing windows.\n");
731 CWP
= (CWP
+ 1) % NWindows
;
734 tc
->setIntReg(NumIntArchRegs
+ 3, Cansave
);
735 tc
->setIntReg(NumIntArchRegs
+ 4, Canrestore
);
736 tc
->setMiscReg(MISCREG_CWP
, origCWP
);