2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 #include "arch/sparc/asi.hh"
33 #include "arch/sparc/handlers.hh"
34 #include "arch/sparc/isa_traits.hh"
35 #include "arch/sparc/process.hh"
36 #include "arch/sparc/types.hh"
37 #include "base/loader/object_file.hh"
38 #include "base/loader/elf_object.hh"
39 #include "base/misc.hh"
40 #include "cpu/thread_context.hh"
41 #include "mem/page_table.hh"
42 #include "sim/process_impl.hh"
43 #include "mem/translating_port.hh"
44 #include "sim/system.hh"
47 using namespace SparcISA
;
50 SparcLiveProcess::SparcLiveProcess(LiveProcessParams
* params
,
52 : LiveProcess(params
, objFile
)
55 // XXX all the below need to be updated for SPARC - Ali
56 brk_point
= objFile
->dataBase() + objFile
->dataSize() + objFile
->bssSize();
57 brk_point
= roundUp(brk_point
, VMPageSize
);
59 // Set pointer for next thread stack. Reserve 8M for main stack.
60 next_thread_stack_base
= stack_base
- (8 * 1024 * 1024);
62 //Initialize these to 0s
67 void SparcLiveProcess::handleTrap(int trapNum
, ThreadContext
*tc
)
71 case 0x01: //Software breakpoint
72 warn("Software breakpoint encountered at pc %#x.\n", tc
->readPC());
74 case 0x02: //Division by zero
75 warn("Software signaled a division by zero at pc %#x.\n",
78 case 0x03: //Flush window trap
81 case 0x04: //Clean windows
82 warn("Ignoring process request for clean register "
83 "windows at pc %#x.\n", tc
->readPC());
85 case 0x05: //Range check
86 warn("Software signaled a range check at pc %#x.\n",
89 case 0x06: //Fix alignment
90 warn("Ignoring process request for os assisted unaligned accesses "
91 "at pc %#x.\n", tc
->readPC());
93 case 0x07: //Integer overflow
94 warn("Software signaled an integer overflow at pc %#x.\n",
97 case 0x32: //Get integer condition codes
98 warn("Ignoring process request to get the integer condition codes "
99 "at pc %#x.\n", tc
->readPC());
101 case 0x33: //Set integer condition codes
102 warn("Ignoring process request to set the integer condition codes "
103 "at pc %#x.\n", tc
->readPC());
106 panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum
);
111 Sparc32LiveProcess::startup()
113 if (checkpointRestored
)
116 argsInit(32 / 8, VMPageSize
);
120 //The process runs in user mode with 32 bit addresses
121 threadContexts
[0]->setMiscReg(MISCREG_PSTATE
, 0x0a);
123 //Setup default FP state
124 threadContexts
[0]->setMiscRegNoEffect(MISCREG_FSR
, 0);
126 threadContexts
[0]->setMiscRegNoEffect(MISCREG_TICK
, 0);
129 * Register window management registers
132 //No windows contain info from other programs
133 //threadContexts[0]->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
134 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 6, 0);
135 //There are no windows to pop
136 //threadContexts[0]->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
137 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 4, 0);
138 //All windows are available to save into
139 //threadContexts[0]->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
140 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 3, NWindows
- 2);
141 //All windows are "clean"
142 //threadContexts[0]->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
143 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 5, NWindows
);
144 //Start with register window 0
145 threadContexts
[0]->setMiscRegNoEffect(MISCREG_CWP
, 0);
146 //Always use spill and fill traps 0
147 //threadContexts[0]->setMiscRegNoEffect(MISCREG_WSTATE, 0);
148 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 7, 0);
149 //Set the trap level to 0
150 threadContexts
[0]->setMiscRegNoEffect(MISCREG_TL
, 0);
151 //Set the ASI register to something fixed
152 threadContexts
[0]->setMiscRegNoEffect(MISCREG_ASI
, ASI_PRIMARY
);
155 * T1 specific registers
157 //Turn on the icache, dcache, dtb translation, and itb translation.
158 threadContexts
[0]->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL
, 15);
162 Sparc64LiveProcess::startup()
164 if (checkpointRestored
)
167 argsInit(sizeof(IntReg
), VMPageSize
);
171 //The process runs in user mode
172 threadContexts
[0]->setMiscReg(MISCREG_PSTATE
, 0x02);
174 //Setup default FP state
175 threadContexts
[0]->setMiscRegNoEffect(MISCREG_FSR
, 0);
177 threadContexts
[0]->setMiscRegNoEffect(MISCREG_TICK
, 0);
180 * Register window management registers
183 //No windows contain info from other programs
184 //threadContexts[0]->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
185 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 6, 0);
186 //There are no windows to pop
187 //threadContexts[0]->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
188 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 4, 0);
189 //All windows are available to save into
190 //threadContexts[0]->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
191 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 3, NWindows
- 2);
192 //All windows are "clean"
193 //threadContexts[0]->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
194 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 5, NWindows
);
195 //Start with register window 0
196 threadContexts
[0]->setMiscRegNoEffect(MISCREG_CWP
, 0);
197 //Always use spill and fill traps 0
198 //threadContexts[0]->setMiscRegNoEffect(MISCREG_WSTATE, 0);
199 threadContexts
[0]->setIntReg(NumIntArchRegs
+ 7, 0);
200 //Set the trap level to 0
201 threadContexts
[0]->setMiscRegNoEffect(MISCREG_TL
, 0);
202 //Set the ASI register to something fixed
203 threadContexts
[0]->setMiscRegNoEffect(MISCREG_ASI
, ASI_PRIMARY
);
206 * T1 specific registers
208 //Turn on the icache, dcache, dtb translation, and itb translation.
209 threadContexts
[0]->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL
, 15);
212 M5_32_auxv_t::M5_32_auxv_t(int32_t type
, int32_t val
)
214 a_type
= TheISA::htog(type
);
215 a_val
= TheISA::htog(val
);
218 M5_64_auxv_t::M5_64_auxv_t(int64_t type
, int64_t val
)
220 a_type
= TheISA::htog(type
);
221 a_val
= TheISA::htog(val
);
225 Sparc64LiveProcess::argsInit(int intSize
, int pageSize
)
227 typedef M5_64_auxv_t auxv_t
;
236 Addr alignmentMask
= ~(intSize
- 1);
238 // load object file into target memory
239 objFile
->loadSections(initVirtMem
);
243 M5_HWCAP_SPARC_FLUSH
= 1,
244 M5_HWCAP_SPARC_STBAR
= 2,
245 M5_HWCAP_SPARC_SWAP
= 4,
246 M5_HWCAP_SPARC_MULDIV
= 8,
247 M5_HWCAP_SPARC_V9
= 16,
248 //This one should technically only be set
249 //if there is a cheetah or cheetah_plus tlb,
250 //but we'll use it all the time
251 M5_HWCAP_SPARC_ULTRA3
= 32
254 const int64_t hwcap
=
255 M5_HWCAP_SPARC_FLUSH
|
256 M5_HWCAP_SPARC_STBAR
|
257 M5_HWCAP_SPARC_SWAP
|
258 M5_HWCAP_SPARC_MULDIV
|
260 M5_HWCAP_SPARC_ULTRA3
;
263 //Setup the auxilliary vectors. These will already have endian conversion.
264 //Auxilliary vectors are loaded only for elf formatted executables.
265 ElfObject
* elfObject
= dynamic_cast<ElfObject
*>(objFile
);
268 //Bits which describe the system hardware capabilities
269 auxv
.push_back(auxv_t(M5_AT_HWCAP
, hwcap
));
270 //The system page size
271 auxv
.push_back(auxv_t(M5_AT_PAGESZ
, SparcISA::VMPageSize
));
272 //Defined to be 100 in the kernel source.
273 //Frequency at which times() increments
274 auxv
.push_back(auxv_t(M5_AT_CLKTCK
, 100));
275 // For statically linked executables, this is the virtual address of the
276 // program header tables if they appear in the executable image
277 auxv
.push_back(auxv_t(M5_AT_PHDR
, elfObject
->programHeaderTable()));
278 // This is the size of a program header entry from the elf file.
279 auxv
.push_back(auxv_t(M5_AT_PHENT
, elfObject
->programHeaderSize()));
280 // This is the number of program headers from the original elf file.
281 auxv
.push_back(auxv_t(M5_AT_PHNUM
, elfObject
->programHeaderCount()));
282 //This is the address of the elf "interpreter", It should be set
283 //to 0 for regular executables. It should be something else
284 //(not sure what) for dynamic libraries.
285 auxv
.push_back(auxv_t(M5_AT_BASE
, 0));
286 //This is hardwired to 0 in the elf loading code in the kernel
287 auxv
.push_back(auxv_t(M5_AT_FLAGS
, 0));
288 //The entry point to the program
289 auxv
.push_back(auxv_t(M5_AT_ENTRY
, objFile
->entryPoint()));
290 //Different user and group IDs
291 auxv
.push_back(auxv_t(M5_AT_UID
, uid()));
292 auxv
.push_back(auxv_t(M5_AT_EUID
, euid()));
293 auxv
.push_back(auxv_t(M5_AT_GID
, gid()));
294 auxv
.push_back(auxv_t(M5_AT_EGID
, egid()));
295 //Whether to enable "secure mode" in the executable
296 auxv
.push_back(auxv_t(M5_AT_SECURE
, 0));
299 //Figure out how big the initial stack needs to be
301 // The unaccounted for 0 at the top of the stack
302 int mysterious_size
= intSize
;
304 //This is the name of the file which is present on the initial stack
305 //It's purpose is to let the user space linker examine the original file.
306 int file_name_size
= filename
.size() + 1;
308 int env_data_size
= 0;
309 for (int i
= 0; i
< envp
.size(); ++i
) {
310 env_data_size
+= envp
[i
].size() + 1;
312 int arg_data_size
= 0;
313 for (int i
= 0; i
< argv
.size(); ++i
) {
314 arg_data_size
+= argv
[i
].size() + 1;
317 //The info_block needs to be padded so it's size is a multiple of the
318 //alignment mask. Also, it appears that there needs to be at least some
319 //padding, so if the size is already a multiple, we need to increase it
321 int info_block_size
=
325 intSize
) & alignmentMask
;
327 int info_block_padding
=
333 //Each auxilliary vector is two 8 byte words
334 int aux_array_size
= intSize
* 2 * (auxv
.size() + 1);
336 int envp_array_size
= intSize
* (envp
.size() + 1);
337 int argv_array_size
= intSize
* (argv
.size() + 1);
339 int argc_size
= intSize
;
340 int window_save_size
= intSize
* 16;
351 stack_min
= stack_base
- space_needed
;
352 stack_min
&= alignmentMask
;
353 stack_size
= stack_base
- stack_min
;
356 pTable
->allocate(roundDown(stack_min
, pageSize
),
357 roundUp(stack_size
, pageSize
));
359 // map out initial stack contents
360 Addr mysterious_base
= stack_base
- mysterious_size
;
361 Addr file_name_base
= mysterious_base
- file_name_size
;
362 Addr env_data_base
= file_name_base
- env_data_size
;
363 Addr arg_data_base
= env_data_base
- arg_data_size
;
364 Addr auxv_array_base
= arg_data_base
- aux_array_size
- info_block_padding
;
365 Addr envp_array_base
= auxv_array_base
- envp_array_size
;
366 Addr argv_array_base
= envp_array_base
- argv_array_size
;
367 Addr argc_base
= argv_array_base
- argc_size
;
369 // only used in DPRINTF
370 Addr window_save_base
= argc_base
- window_save_size
;
373 DPRINTF(Sparc
, "The addresses of items on the initial stack:\n");
374 DPRINTF(Sparc
, "0x%x - file name\n", file_name_base
);
375 DPRINTF(Sparc
, "0x%x - env data\n", env_data_base
);
376 DPRINTF(Sparc
, "0x%x - arg data\n", arg_data_base
);
377 DPRINTF(Sparc
, "0x%x - auxv array\n", auxv_array_base
);
378 DPRINTF(Sparc
, "0x%x - envp array\n", envp_array_base
);
379 DPRINTF(Sparc
, "0x%x - argv array\n", argv_array_base
);
380 DPRINTF(Sparc
, "0x%x - argc \n", argc_base
);
381 DPRINTF(Sparc
, "0x%x - window save\n", window_save_base
);
382 DPRINTF(Sparc
, "0x%x - stack min\n", stack_min
);
384 // write contents to stack
387 uint64_t argc
= argv
.size();
388 uint64_t guestArgc
= TheISA::htog(argc
);
390 //Write out the mysterious 0
391 uint64_t mysterious_zero
= 0;
392 initVirtMem
->writeBlob(mysterious_base
,
393 (uint8_t*)&mysterious_zero
, mysterious_size
);
395 //Write the file name
396 initVirtMem
->writeString(file_name_base
, filename
.c_str());
399 for(int x
= 0; x
< auxv
.size(); x
++)
401 initVirtMem
->writeBlob(auxv_array_base
+ x
* 2 * intSize
,
402 (uint8_t*)&(auxv
[x
].a_type
), intSize
);
403 initVirtMem
->writeBlob(auxv_array_base
+ (x
* 2 + 1) * intSize
,
404 (uint8_t*)&(auxv
[x
].a_val
), intSize
);
406 //Write out the terminating zeroed auxilliary vector
407 const uint64_t zero
= 0;
408 initVirtMem
->writeBlob(auxv_array_base
+ 2 * intSize
* auxv
.size(),
409 (uint8_t*)&zero
, 2 * intSize
);
411 copyStringArray(envp
, envp_array_base
, env_data_base
, initVirtMem
);
412 copyStringArray(argv
, argv_array_base
, arg_data_base
, initVirtMem
);
414 initVirtMem
->writeBlob(argc_base
, (uint8_t*)&guestArgc
, intSize
);
416 //Stuff the trap handlers into the processes address space.
417 //Since the stack grows down and is the highest area in the processes
418 //address space, we can put stuff above it and stay out of the way.
419 int fillSize
= sizeof(MachInst
) * numFillInsts
;
420 int spillSize
= sizeof(MachInst
) * numSpillInsts
;
421 fillStart
= stack_base
;
422 spillStart
= fillStart
+ fillSize
;
423 initVirtMem
->writeBlob(fillStart
, (uint8_t*)fillHandler64
, fillSize
);
424 initVirtMem
->writeBlob(spillStart
, (uint8_t*)spillHandler64
, spillSize
);
426 //Set up the thread context to start running the process
427 assert(NumArgumentRegs
>= 2);
428 threadContexts
[0]->setIntReg(ArgumentReg
[0], argc
);
429 threadContexts
[0]->setIntReg(ArgumentReg
[1], argv_array_base
);
430 threadContexts
[0]->setIntReg(StackPointerReg
, stack_min
- StackBias
);
432 // %g1 is a pointer to a function that should be run at exit. Since we
433 // don't have anything like that, it should be set to 0.
434 threadContexts
[0]->setIntReg(1, 0);
436 Addr prog_entry
= objFile
->entryPoint();
437 threadContexts
[0]->setPC(prog_entry
);
438 threadContexts
[0]->setNextPC(prog_entry
+ sizeof(MachInst
));
439 threadContexts
[0]->setNextNPC(prog_entry
+ (2 * sizeof(MachInst
)));
441 //Align the "stack_min" to a page boundary.
442 stack_min
= roundDown(stack_min
, pageSize
);
448 Sparc32LiveProcess::argsInit(int intSize
, int pageSize
)
450 typedef M5_32_auxv_t auxv_t
;
459 //Even though this is a 32 bit process, the ABI says we still need to
460 //maintain double word alignment of the stack pointer.
461 Addr alignmentMask
= ~(8 - 1);
463 // load object file into target memory
464 objFile
->loadSections(initVirtMem
);
466 //These are the auxilliary vector types
471 SPARC_AT_CLKTCK
= 17,
487 M5_HWCAP_SPARC_FLUSH
= 1,
488 M5_HWCAP_SPARC_STBAR
= 2,
489 M5_HWCAP_SPARC_SWAP
= 4,
490 M5_HWCAP_SPARC_MULDIV
= 8,
491 M5_HWCAP_SPARC_V9
= 16,
492 //This one should technically only be set
493 //if there is a cheetah or cheetah_plus tlb,
494 //but we'll use it all the time
495 M5_HWCAP_SPARC_ULTRA3
= 32
498 const int64_t hwcap
=
499 M5_HWCAP_SPARC_FLUSH
|
500 M5_HWCAP_SPARC_STBAR
|
501 M5_HWCAP_SPARC_SWAP
|
502 M5_HWCAP_SPARC_MULDIV
|
504 M5_HWCAP_SPARC_ULTRA3
;
507 //Setup the auxilliary vectors. These will already have endian conversion.
508 //Auxilliary vectors are loaded only for elf formatted executables.
509 ElfObject
* elfObject
= dynamic_cast<ElfObject
*>(objFile
);
512 //Bits which describe the system hardware capabilities
513 auxv
.push_back(auxv_t(SPARC_AT_HWCAP
, hwcap
));
514 //The system page size
515 auxv
.push_back(auxv_t(SPARC_AT_PAGESZ
, SparcISA::VMPageSize
));
516 //Defined to be 100 in the kernel source.
517 //Frequency at which times() increments
518 auxv
.push_back(auxv_t(SPARC_AT_CLKTCK
, 100));
519 // For statically linked executables, this is the virtual address of the
520 // program header tables if they appear in the executable image
521 auxv
.push_back(auxv_t(SPARC_AT_PHDR
, elfObject
->programHeaderTable()));
522 // This is the size of a program header entry from the elf file.
523 auxv
.push_back(auxv_t(SPARC_AT_PHENT
, elfObject
->programHeaderSize()));
524 // This is the number of program headers from the original elf file.
525 auxv
.push_back(auxv_t(SPARC_AT_PHNUM
, elfObject
->programHeaderCount()));
526 //This is the address of the elf "interpreter", It should be set
527 //to 0 for regular executables. It should be something else
528 //(not sure what) for dynamic libraries.
529 auxv
.push_back(auxv_t(SPARC_AT_BASE
, 0));
530 //This is hardwired to 0 in the elf loading code in the kernel
531 auxv
.push_back(auxv_t(SPARC_AT_FLAGS
, 0));
532 //The entry point to the program
533 auxv
.push_back(auxv_t(SPARC_AT_ENTRY
, objFile
->entryPoint()));
534 //Different user and group IDs
535 auxv
.push_back(auxv_t(SPARC_AT_UID
, uid()));
536 auxv
.push_back(auxv_t(SPARC_AT_EUID
, euid()));
537 auxv
.push_back(auxv_t(SPARC_AT_GID
, gid()));
538 auxv
.push_back(auxv_t(SPARC_AT_EGID
, egid()));
539 //Whether to enable "secure mode" in the executable
540 auxv
.push_back(auxv_t(SPARC_AT_SECURE
, 0));
543 //Figure out how big the initial stack needs to be
545 // The unaccounted for 8 byte 0 at the top of the stack
546 int mysterious_size
= 8;
548 //This is the name of the file which is present on the initial stack
549 //It's purpose is to let the user space linker examine the original file.
550 int file_name_size
= filename
.size() + 1;
552 int env_data_size
= 0;
553 for (int i
= 0; i
< envp
.size(); ++i
) {
554 env_data_size
+= envp
[i
].size() + 1;
556 int arg_data_size
= 0;
557 for (int i
= 0; i
< argv
.size(); ++i
) {
558 arg_data_size
+= argv
[i
].size() + 1;
561 //The info_block - This seems to need an pad for some reason.
562 int info_block_size
=
566 arg_data_size
+ intSize
);
568 //Each auxilliary vector is two 4 byte words
569 int aux_array_size
= intSize
* 2 * (auxv
.size() + 1);
571 int envp_array_size
= intSize
* (envp
.size() + 1);
572 int argv_array_size
= intSize
* (argv
.size() + 1);
574 int argc_size
= intSize
;
575 int window_save_size
= intSize
* 16;
585 stack_min
= stack_base
- space_needed
;
586 stack_min
&= alignmentMask
;
587 stack_size
= stack_base
- stack_min
;
590 pTable
->allocate(roundDown(stack_min
, pageSize
),
591 roundUp(stack_size
, pageSize
));
593 // map out initial stack contents
594 uint32_t window_save_base
= stack_min
;
595 uint32_t argc_base
= window_save_base
+ window_save_size
;
596 uint32_t argv_array_base
= argc_base
+ argc_size
;
597 uint32_t envp_array_base
= argv_array_base
+ argv_array_size
;
598 uint32_t auxv_array_base
= envp_array_base
+ envp_array_size
;
599 //The info block is pushed up against the top of the stack, while
600 //the rest of the initial stack frame is aligned to an 8 byte boudary.
601 uint32_t arg_data_base
= stack_base
- info_block_size
+ intSize
;
602 uint32_t env_data_base
= arg_data_base
+ arg_data_size
;
603 uint32_t file_name_base
= env_data_base
+ env_data_size
;
604 uint32_t mysterious_base
= file_name_base
+ file_name_size
;
606 DPRINTF(Sparc
, "The addresses of items on the initial stack:\n");
607 DPRINTF(Sparc
, "0x%x - file name\n", file_name_base
);
608 DPRINTF(Sparc
, "0x%x - env data\n", env_data_base
);
609 DPRINTF(Sparc
, "0x%x - arg data\n", arg_data_base
);
610 DPRINTF(Sparc
, "0x%x - auxv array\n", auxv_array_base
);
611 DPRINTF(Sparc
, "0x%x - envp array\n", envp_array_base
);
612 DPRINTF(Sparc
, "0x%x - argv array\n", argv_array_base
);
613 DPRINTF(Sparc
, "0x%x - argc \n", argc_base
);
614 DPRINTF(Sparc
, "0x%x - window save\n", window_save_base
);
615 DPRINTF(Sparc
, "0x%x - stack min\n", stack_min
);
617 // write contents to stack
620 uint32_t argc
= argv
.size();
621 uint32_t guestArgc
= TheISA::htog(argc
);
623 //Write out the mysterious 0
624 uint64_t mysterious_zero
= 0;
625 initVirtMem
->writeBlob(mysterious_base
,
626 (uint8_t*)&mysterious_zero
, mysterious_size
);
628 //Write the file name
629 initVirtMem
->writeString(file_name_base
, filename
.c_str());
632 for(int x
= 0; x
< auxv
.size(); x
++)
634 initVirtMem
->writeBlob(auxv_array_base
+ x
* 2 * intSize
,
635 (uint8_t*)&(auxv
[x
].a_type
), intSize
);
636 initVirtMem
->writeBlob(auxv_array_base
+ (x
* 2 + 1) * intSize
,
637 (uint8_t*)&(auxv
[x
].a_val
), intSize
);
639 //Write out the terminating zeroed auxilliary vector
640 const uint64_t zero
= 0;
641 initVirtMem
->writeBlob(auxv_array_base
+ 2 * intSize
* auxv
.size(),
642 (uint8_t*)&zero
, 2 * intSize
);
644 copyStringArray(envp
, envp_array_base
, env_data_base
, initVirtMem
);
645 copyStringArray(argv
, argv_array_base
, arg_data_base
, initVirtMem
);
647 initVirtMem
->writeBlob(argc_base
, (uint8_t*)&guestArgc
, intSize
);
649 //Stuff the trap handlers into the processes address space.
650 //Since the stack grows down and is the highest area in the processes
651 //address space, we can put stuff above it and stay out of the way.
652 int fillSize
= sizeof(MachInst
) * numFillInsts
;
653 int spillSize
= sizeof(MachInst
) * numSpillInsts
;
654 fillStart
= stack_base
;
655 spillStart
= fillStart
+ fillSize
;
656 initVirtMem
->writeBlob(fillStart
, (uint8_t*)fillHandler32
, fillSize
);
657 initVirtMem
->writeBlob(spillStart
, (uint8_t*)spillHandler32
, spillSize
);
659 //Set up the thread context to start running the process
660 //assert(NumArgumentRegs >= 2);
661 //threadContexts[0]->setIntReg(ArgumentReg[0], argc);
662 //threadContexts[0]->setIntReg(ArgumentReg[1], argv_array_base);
663 threadContexts
[0]->setIntReg(StackPointerReg
, stack_min
);
665 // %g1 is a pointer to a function that should be run at exit. Since we
666 // don't have anything like that, it should be set to 0.
667 threadContexts
[0]->setIntReg(1, 0);
669 uint32_t prog_entry
= objFile
->entryPoint();
670 threadContexts
[0]->setPC(prog_entry
);
671 threadContexts
[0]->setNextPC(prog_entry
+ sizeof(MachInst
));
672 threadContexts
[0]->setNextNPC(prog_entry
+ (2 * sizeof(MachInst
)));
674 //Align the "stack_min" to a page boundary.
675 stack_min
= roundDown(stack_min
, pageSize
);
680 void Sparc32LiveProcess::flushWindows(ThreadContext
*tc
)
682 IntReg Cansave
= tc
->readIntReg(NumIntArchRegs
+ 3);
683 IntReg Canrestore
= tc
->readIntReg(NumIntArchRegs
+ 4);
684 IntReg Otherwin
= tc
->readIntReg(NumIntArchRegs
+ 6);
685 MiscReg CWP
= tc
->readMiscReg(MISCREG_CWP
);
686 MiscReg origCWP
= CWP
;
687 CWP
= (CWP
+ Cansave
+ 2) % NWindows
;
688 while(NWindows
- 2 - Cansave
!= 0)
691 panic("Otherwin non-zero.\n");
693 tc
->setMiscReg(MISCREG_CWP
, CWP
);
695 IntReg sp
= tc
->readIntReg(StackPointerReg
);
696 for (int index
= 16; index
< 32; index
++) {
697 IntReg regVal
= tc
->readIntReg(index
);
698 regVal
= htog(regVal
);
699 if (!tc
->getMemPort()->tryWriteBlob(
700 sp
+ (index
- 16) * 4, (uint8_t *)®Val
, 4)) {
701 warn("Failed to save register to the stack when "
702 "flushing windows.\n");
707 CWP
= (CWP
+ 1) % NWindows
;
710 tc
->setIntReg(NumIntArchRegs
+ 3, Cansave
);
711 tc
->setIntReg(NumIntArchRegs
+ 4, Canrestore
);
712 tc
->setMiscReg(MISCREG_CWP
, origCWP
);
715 void Sparc64LiveProcess::flushWindows(ThreadContext
*tc
)
717 IntReg Cansave
= tc
->readIntReg(NumIntArchRegs
+ 3);
718 IntReg Canrestore
= tc
->readIntReg(NumIntArchRegs
+ 4);
719 IntReg Otherwin
= tc
->readIntReg(NumIntArchRegs
+ 6);
720 MiscReg CWP
= tc
->readMiscReg(MISCREG_CWP
);
721 MiscReg origCWP
= CWP
;
722 CWP
= (CWP
+ Cansave
+ 2) % NWindows
;
723 while(NWindows
- 2 - Cansave
!= 0)
726 panic("Otherwin non-zero.\n");
728 tc
->setMiscReg(MISCREG_CWP
, CWP
);
730 IntReg sp
= tc
->readIntReg(StackPointerReg
);
731 for (int index
= 16; index
< 32; index
++) {
732 IntReg regVal
= tc
->readIntReg(index
);
733 regVal
= htog(regVal
);
734 if (!tc
->getMemPort()->tryWriteBlob(
735 sp
+ 2047 + (index
- 16) * 8, (uint8_t *)®Val
, 8)) {
736 warn("Failed to save register to the stack when "
737 "flushing windows.\n");
742 CWP
= (CWP
+ 1) % NWindows
;
745 tc
->setIntReg(NumIntArchRegs
+ 3, Cansave
);
746 tc
->setIntReg(NumIntArchRegs
+ 4, Canrestore
);
747 tc
->setMiscReg(MISCREG_CWP
, origCWP
);