Merge zizzer.eecs.umich.edu:/bk/newmem
[gem5.git] / src / arch / sparc / process.cc
1 /*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Ali Saidi
30 */
31
32 #include "arch/sparc/isa_traits.hh"
33 #include "arch/sparc/process.hh"
34 #include "base/loader/object_file.hh"
35 #include "base/misc.hh"
36 #include "cpu/thread_context.hh"
37 #include "mem/page_table.hh"
38 #include "mem/translating_port.hh"
39 #include "sim/system.hh"
40
41 using namespace std;
42 using namespace SparcISA;
43
44
45 SparcLiveProcess::SparcLiveProcess(const std::string &nm, ObjectFile *objFile,
46 System *_system, int stdin_fd, int stdout_fd, int stderr_fd,
47 std::vector<std::string> &argv, std::vector<std::string> &envp)
48 : LiveProcess(nm, objFile, _system, stdin_fd, stdout_fd, stderr_fd,
49 argv, envp)
50 {
51
52 // XXX all the below need to be updated for SPARC - Ali
53 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
54 brk_point = roundUp(brk_point, VMPageSize);
55
56 // Set up stack. On SPARC Linux, stack goes from the top of memory
57 // downward, less the hole for the kernel address space.
58 stack_base = ((Addr)0x80000000000ULL);
59
60 // Set up region for mmaps. Tru64 seems to start just above 0 and
61 // grow up from there.
62 mmap_start = mmap_end = 0x800000;
63
64 // Set pointer for next thread stack. Reserve 8M for main stack.
65 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
66 }
67
68 void
69 SparcLiveProcess::startup()
70 {
71 argsInit(MachineBytes, VMPageSize);
72
73 //From the SPARC ABI
74
75 //The process runs in user mode
76 threadContexts[0]->setMiscRegWithEffect(MISCREG_PSTATE, 0x02);
77
78 //Setup default FP state
79 threadContexts[0]->setMiscReg(MISCREG_FSR, 0);
80
81 threadContexts[0]->setMiscReg(MISCREG_TICK, 0);
82 //
83 /*
84 * Register window management registers
85 */
86
87 //No windows contain info from other programs
88 threadContexts[0]->setMiscRegWithEffect(MISCREG_OTHERWIN, 0);
89 //There are no windows to pop
90 threadContexts[0]->setMiscRegWithEffect(MISCREG_CANRESTORE, 0);
91 //All windows are available to save into
92 threadContexts[0]->setMiscRegWithEffect(MISCREG_CANSAVE, NWindows - 2);
93 //All windows are "clean"
94 threadContexts[0]->setMiscRegWithEffect(MISCREG_CLEANWIN, NWindows);
95 //Start with register window 0
96 threadContexts[0]->setMiscRegWithEffect(MISCREG_CWP, 0);
97 }
98
99 m5_auxv_t buildAuxVect(int64_t type, int64_t val)
100 {
101 m5_auxv_t result;
102 result.a_type = TheISA::htog(type);
103 result.a_val = TheISA::htog(val);
104 return result;
105 }
106
107 void
108 SparcLiveProcess::argsInit(int intSize, int pageSize)
109 {
110 Process::startup();
111
112 Addr alignmentMask = ~(intSize - 1);
113
114 // load object file into target memory
115 objFile->loadSections(initVirtMem);
116
117 //These are the auxilliary vector types
118 enum auxTypes
119 {
120 SPARC_AT_HWCAP = 16,
121 SPARC_AT_PAGESZ = 6,
122 SPARC_AT_CLKTCK = 17,
123 SPARC_AT_PHDR = 3,
124 SPARC_AT_PHENT = 4,
125 SPARC_AT_PHNUM = 5,
126 SPARC_AT_BASE = 7,
127 SPARC_AT_FLAGS = 8,
128 SPARC_AT_ENTRY = 9,
129 SPARC_AT_UID = 11,
130 SPARC_AT_EUID = 12,
131 SPARC_AT_GID = 13,
132 SPARC_AT_EGID = 14
133 };
134
135 enum hardwareCaps
136 {
137 M5_HWCAP_SPARC_FLUSH = 1,
138 M5_HWCAP_SPARC_STBAR = 2,
139 M5_HWCAP_SPARC_SWAP = 4,
140 M5_HWCAP_SPARC_MULDIV = 8,
141 M5_HWCAP_SPARC_V9 = 16,
142 //This one should technically only be set
143 //if there is a cheetah or cheetah_plus tlb,
144 //but we'll use it all the time
145 M5_HWCAP_SPARC_ULTRA3 = 32
146 };
147
148 const int64_t hwcap =
149 M5_HWCAP_SPARC_FLUSH |
150 M5_HWCAP_SPARC_STBAR |
151 M5_HWCAP_SPARC_SWAP |
152 M5_HWCAP_SPARC_MULDIV |
153 M5_HWCAP_SPARC_V9 |
154 M5_HWCAP_SPARC_ULTRA3;
155
156 //Setup the auxilliary vectors. These will already have
157 //endian conversion.
158 auxv.push_back(buildAuxVect(SPARC_AT_EGID, 100));
159 auxv.push_back(buildAuxVect(SPARC_AT_GID, 100));
160 auxv.push_back(buildAuxVect(SPARC_AT_EUID, 100));
161 auxv.push_back(buildAuxVect(SPARC_AT_UID, 100));
162 //This would work, but the entry point is a protected member
163 //auxv.push_back(buildAuxVect(SPARC_AT_ENTRY, objFile->entry));
164 auxv.push_back(buildAuxVect(SPARC_AT_FLAGS, 0));
165 //This is the address of the elf "interpreter", which I don't
166 //think we currently set up. It should be set to 0 (I think)
167 //auxv.push_back(buildAuxVect(SPARC_AT_BASE, 0));
168 //This is the number of headers which were in the original elf
169 //file. This information isn't avaibale by this point.
170 //auxv.push_back(buildAuxVect(SPARC_AT_PHNUM, 3));
171 //This is the size of a program header entry. This isn't easy
172 //to compute here.
173 //auxv.push_back(buildAuxVect(SPARC_AT_PHENT, blah));
174 //This is should be set to load_addr (whatever that is) +
175 //e_phoff. I think it's a pointer to the program headers.
176 //auxv.push_back(buildAuxVect(SPARC_AT_PHDR, blah));
177 //This should be easy to get right, but I won't set it for now
178 //auxv.push_back(buildAuxVect(SPARC_AT_CLKTCK, blah));
179 auxv.push_back(buildAuxVect(SPARC_AT_PAGESZ, SparcISA::VMPageSize));
180 auxv.push_back(buildAuxVect(SPARC_AT_HWCAP, hwcap));
181
182 //Figure out how big the initial stack needs to be
183
184 //Each auxilliary vector is two 8 byte words
185 int aux_data_size = 2 * intSize * auxv.size();
186 int env_data_size = 0;
187 for (int i = 0; i < envp.size(); ++i) {
188 env_data_size += envp[i].size() + 1;
189 }
190 int arg_data_size = 0;
191 for (int i = 0; i < argv.size(); ++i) {
192 arg_data_size += argv[i].size() + 1;
193 }
194
195 int aux_array_size = intSize * 2 * (auxv.size() + 1);
196
197 int argv_array_size = intSize * (argv.size() + 1);
198 int envp_array_size = intSize * (envp.size() + 1);
199
200 int argc_size = intSize;
201 int window_save_size = intSize * 16;
202
203 int info_block_size =
204 (aux_data_size +
205 env_data_size +
206 arg_data_size +
207 ~alignmentMask) & alignmentMask;
208
209 int info_block_padding =
210 info_block_size -
211 aux_data_size -
212 env_data_size -
213 arg_data_size;
214
215 int space_needed =
216 info_block_size +
217 aux_array_size +
218 envp_array_size +
219 argv_array_size +
220 argc_size +
221 window_save_size;
222
223 stack_min = stack_base - space_needed;
224 stack_min &= alignmentMask;
225 stack_size = stack_base - stack_min;
226
227 // map memory
228 pTable->allocate(roundDown(stack_min, pageSize),
229 roundUp(stack_size, pageSize));
230
231 // map out initial stack contents
232 Addr aux_data_base = stack_base - aux_data_size - info_block_padding;
233 Addr env_data_base = aux_data_base - env_data_size;
234 Addr arg_data_base = env_data_base - arg_data_size;
235 Addr auxv_array_base = arg_data_base - aux_array_size;
236 Addr envp_array_base = auxv_array_base - envp_array_size;
237 Addr argv_array_base = envp_array_base - argv_array_size;
238 Addr argc_base = argv_array_base - argc_size;
239 Addr window_save_base = argc_base - window_save_size;
240
241 DPRINTF(Sparc, "The addresses of items on the initial stack:\n");
242 DPRINTF(Sparc, "0x%x - aux data\n", aux_data_base);
243 DPRINTF(Sparc, "0x%x - env data\n", env_data_base);
244 DPRINTF(Sparc, "0x%x - arg data\n", arg_data_base);
245 DPRINTF(Sparc, "0x%x - auxv array\n", auxv_array_base);
246 DPRINTF(Sparc, "0x%x - envp array\n", envp_array_base);
247 DPRINTF(Sparc, "0x%x - argv array\n", argv_array_base);
248 DPRINTF(Sparc, "0x%x - argc \n", argc_base);
249 DPRINTF(Sparc, "0x%x - window save\n", window_save_base);
250 DPRINTF(Sparc, "0x%x - stack min\n", stack_min);
251
252 // write contents to stack
253 uint64_t argc = argv.size();
254 uint64_t guestArgc = TheISA::htog(argc);
255
256 //Copy the aux stuff
257 for(int x = 0; x < auxv.size(); x++)
258 {
259 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
260 (uint8_t*)&(auxv[x].a_type), intSize);
261 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
262 (uint8_t*)&(auxv[x].a_val), intSize);
263 }
264 //Write out the terminating zeroed auxilliary vector
265 const uint64_t zero = 0;
266 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
267 (uint8_t*)&zero, 2 * intSize);
268
269 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
270 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
271
272 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
273
274 threadContexts[0]->setIntReg(ArgumentReg0, argc);
275 threadContexts[0]->setIntReg(ArgumentReg1, argv_array_base);
276 threadContexts[0]->setIntReg(StackPointerReg, stack_min - StackBias);
277
278 Addr prog_entry = objFile->entryPoint();
279 threadContexts[0]->setPC(prog_entry);
280 threadContexts[0]->setNextPC(prog_entry + sizeof(MachInst));
281 threadContexts[0]->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
282
283 // num_processes++;
284 }