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32 #include "arch/sparc/regfile.hh"
33 #include "cpu/thread_context.hh"
37 using namespace SparcISA
;
40 //RegFile class methods
41 Addr
RegFile::readPC()
46 void RegFile::setPC(Addr val
)
51 Addr
RegFile::readNextPC()
56 void RegFile::setNextPC(Addr val
)
61 Addr
RegFile::readNextNPC()
66 void RegFile::setNextNPC(Addr val
)
78 MiscReg
RegFile::readMiscRegNoEffect(int miscReg
)
80 return miscRegFile
.readRegNoEffect(miscReg
);
83 MiscReg
RegFile::readMiscReg(int miscReg
, ThreadContext
*tc
)
85 return miscRegFile
.readReg(miscReg
, tc
);
88 void RegFile::setMiscRegNoEffect(int miscReg
, const MiscReg
&val
)
90 miscRegFile
.setRegNoEffect(miscReg
, val
);
93 void RegFile::setMiscReg(int miscReg
, const MiscReg
&val
,
96 miscRegFile
.setReg(miscReg
, val
, tc
);
99 FloatReg
RegFile::readFloatReg(int floatReg
, int width
)
101 return floatRegFile
.readReg(floatReg
, width
);
104 FloatReg
RegFile::readFloatReg(int floatReg
)
106 //Use the "natural" width of a single float
107 return floatRegFile
.readReg(floatReg
, FloatRegFile::SingleWidth
);
110 FloatRegBits
RegFile::readFloatRegBits(int floatReg
, int width
)
112 return floatRegFile
.readRegBits(floatReg
, width
);
115 FloatRegBits
RegFile::readFloatRegBits(int floatReg
)
117 //Use the "natural" width of a single float
118 return floatRegFile
.readRegBits(floatReg
,
119 FloatRegFile::SingleWidth
);
122 void RegFile::setFloatReg(int floatReg
, const FloatReg
&val
, int width
)
124 floatRegFile
.setReg(floatReg
, val
, width
);
127 void RegFile::setFloatReg(int floatReg
, const FloatReg
&val
)
129 //Use the "natural" width of a single float
130 setFloatReg(floatReg
, val
, FloatRegFile::SingleWidth
);
133 void RegFile::setFloatRegBits(int floatReg
, const FloatRegBits
&val
, int width
)
135 floatRegFile
.setRegBits(floatReg
, val
, width
);
138 void RegFile::setFloatRegBits(int floatReg
, const FloatRegBits
&val
)
140 //Use the "natural" width of a single float
141 floatRegFile
.setRegBits(floatReg
, val
, FloatRegFile::SingleWidth
);
144 IntReg
RegFile::readIntReg(int intReg
)
146 return intRegFile
.readReg(intReg
);
149 void RegFile::setIntReg(int intReg
, const IntReg
&val
)
151 intRegFile
.setReg(intReg
, val
);
154 int SparcISA::flattenIntIndex(ThreadContext
* tc
, int reg
)
156 int gl
= tc
->readMiscRegNoEffect(MISCREG_GL
);
157 int cwp
= tc
->readMiscRegNoEffect(MISCREG_CWP
);
158 //DPRINTF(RegisterWindows, "Global Level = %d, Current Window Pointer = %d\n", gl, cwp);
160 //The total number of global registers
161 int numGlobals
= (MaxGL
+ 1) * 8;
165 //Put it in the appropriate set of globals
166 newReg
= reg
+ gl
* 8;
168 else if(reg
< NumIntArchRegs
)
170 //Regular windowed register
171 //Put it in the window pointed to by cwp
172 newReg
= numGlobals
+
173 ((reg
- 8 - cwp
* 16 + NWindows
* 16) % (NWindows
* 16));
175 else if(reg
< NumIntArchRegs
+ NumMicroIntRegs
)
178 //Displace from the end of the regular registers
179 newReg
= reg
- NumIntArchRegs
+ numGlobals
+ NWindows
* 16;
181 else if(reg
< 2 * NumIntArchRegs
+ NumMicroIntRegs
)
183 reg
-= (NumIntArchRegs
+ NumMicroIntRegs
);
186 //Global register from the next window
187 //Put it in the appropriate set of globals
188 newReg
= reg
+ gl
* 8;
192 //Windowed register from the previous window
193 //Put it in the window before the one pointed to by cwp
194 newReg
= numGlobals
+
195 ((reg
- 8 - (cwp
- 1) * 16 + NWindows
* 16) % (NWindows
* 16));
198 else if(reg
< 3 * NumIntArchRegs
+ NumMicroIntRegs
)
200 reg
-= (2 * NumIntArchRegs
+ NumMicroIntRegs
);
203 //Global register from the previous window
204 //Put it in the appropriate set of globals
205 newReg
= reg
+ gl
* 8;
209 //Windowed register from the next window
210 //Put it in the window after the one pointed to by cwp
211 newReg
= numGlobals
+
212 ((reg
- 8 - (cwp
+ 1) * 16 + NWindows
* 16) % (NWindows
* 16));
216 panic("Tried to flatten invalid register index %d!\n", reg
);
217 DPRINTF(RegisterWindows
, "Flattened register %d to %d.\n", reg
, newReg
);
219 //return intRegFile.flattenIndex(reg);
223 RegFile::serialize(EventManager
*em
, ostream
&os
)
225 intRegFile
.serialize(os
);
226 floatRegFile
.serialize(os
);
227 miscRegFile
.serialize(em
, os
);
228 SERIALIZE_SCALAR(pc
);
229 SERIALIZE_SCALAR(npc
);
230 SERIALIZE_SCALAR(nnpc
);
234 RegFile::unserialize(EventManager
*em
, Checkpoint
*cp
, const string
§ion
)
236 intRegFile
.unserialize(cp
, section
);
237 floatRegFile
.unserialize(cp
, section
);
238 miscRegFile
.unserialize(em
, cp
, section
);
239 UNSERIALIZE_SCALAR(pc
);
240 UNSERIALIZE_SCALAR(npc
);
241 UNSERIALIZE_SCALAR(nnpc
);
244 void SparcISA::copyMiscRegs(ThreadContext
*src
, ThreadContext
*dest
)
247 uint8_t tl
= src
->readMiscRegNoEffect(MISCREG_TL
);
249 // Read all the trap level dependent registers and save them off
250 for(int i
= 1; i
<= MaxTL
; i
++)
252 src
->setMiscRegNoEffect(MISCREG_TL
, i
);
253 dest
->setMiscRegNoEffect(MISCREG_TL
, i
);
255 dest
->setMiscRegNoEffect(MISCREG_TT
, src
->readMiscRegNoEffect(MISCREG_TT
));
256 dest
->setMiscRegNoEffect(MISCREG_TPC
, src
->readMiscRegNoEffect(MISCREG_TPC
));
257 dest
->setMiscRegNoEffect(MISCREG_TNPC
, src
->readMiscRegNoEffect(MISCREG_TNPC
));
258 dest
->setMiscRegNoEffect(MISCREG_TSTATE
, src
->readMiscRegNoEffect(MISCREG_TSTATE
));
261 // Save off the traplevel
262 dest
->setMiscRegNoEffect(MISCREG_TL
, tl
);
263 src
->setMiscRegNoEffect(MISCREG_TL
, tl
);
267 // dest->setMiscRegNoEffect(MISCREG_Y, src->readMiscRegNoEffect(MISCREG_Y));
268 // dest->setMiscRegNoEffect(MISCREG_CCR, src->readMiscRegNoEffect(MISCREG_CCR));
269 dest
->setMiscRegNoEffect(MISCREG_ASI
, src
->readMiscRegNoEffect(MISCREG_ASI
));
270 dest
->setMiscRegNoEffect(MISCREG_TICK
, src
->readMiscRegNoEffect(MISCREG_TICK
));
271 dest
->setMiscRegNoEffect(MISCREG_FPRS
, src
->readMiscRegNoEffect(MISCREG_FPRS
));
272 dest
->setMiscRegNoEffect(MISCREG_SOFTINT
, src
->readMiscRegNoEffect(MISCREG_SOFTINT
));
273 dest
->setMiscRegNoEffect(MISCREG_TICK_CMPR
, src
->readMiscRegNoEffect(MISCREG_TICK_CMPR
));
274 dest
->setMiscRegNoEffect(MISCREG_STICK
, src
->readMiscRegNoEffect(MISCREG_STICK
));
275 dest
->setMiscRegNoEffect(MISCREG_STICK_CMPR
, src
->readMiscRegNoEffect(MISCREG_STICK_CMPR
));
278 dest
->setMiscRegNoEffect(MISCREG_TICK
, src
->readMiscRegNoEffect(MISCREG_TICK
));
279 dest
->setMiscRegNoEffect(MISCREG_TBA
, src
->readMiscRegNoEffect(MISCREG_TBA
));
280 dest
->setMiscRegNoEffect(MISCREG_PSTATE
, src
->readMiscRegNoEffect(MISCREG_PSTATE
));
281 dest
->setMiscRegNoEffect(MISCREG_PIL
, src
->readMiscRegNoEffect(MISCREG_PIL
));
282 dest
->setMiscRegNoEffect(MISCREG_CWP
, src
->readMiscRegNoEffect(MISCREG_CWP
));
283 // dest->setMiscRegNoEffect(MISCREG_CANSAVE, src->readMiscRegNoEffect(MISCREG_CANSAVE));
284 // dest->setMiscRegNoEffect(MISCREG_CANRESTORE, src->readMiscRegNoEffect(MISCREG_CANRESTORE));
285 // dest->setMiscRegNoEffect(MISCREG_OTHERWIN, src->readMiscRegNoEffect(MISCREG_OTHERWIN));
286 // dest->setMiscRegNoEffect(MISCREG_CLEANWIN, src->readMiscRegNoEffect(MISCREG_CLEANWIN));
287 // dest->setMiscRegNoEffect(MISCREG_WSTATE, src->readMiscRegNoEffect(MISCREG_WSTATE));
288 dest
->setMiscRegNoEffect(MISCREG_GL
, src
->readMiscRegNoEffect(MISCREG_GL
));
290 // Hyperprivilged registers
291 dest
->setMiscRegNoEffect(MISCREG_HPSTATE
, src
->readMiscRegNoEffect(MISCREG_HPSTATE
));
292 dest
->setMiscRegNoEffect(MISCREG_HINTP
, src
->readMiscRegNoEffect(MISCREG_HINTP
));
293 dest
->setMiscRegNoEffect(MISCREG_HTBA
, src
->readMiscRegNoEffect(MISCREG_HTBA
));
294 dest
->setMiscRegNoEffect(MISCREG_STRAND_STS_REG
,
295 src
->readMiscRegNoEffect(MISCREG_STRAND_STS_REG
));
296 dest
->setMiscRegNoEffect(MISCREG_HSTICK_CMPR
,
297 src
->readMiscRegNoEffect(MISCREG_HSTICK_CMPR
));
300 dest
->setMiscRegNoEffect(MISCREG_FSR
, src
->readMiscRegNoEffect(MISCREG_FSR
));
302 //Strand Status Register
303 dest
->setMiscRegNoEffect(MISCREG_STRAND_STS_REG
,
304 src
->readMiscRegNoEffect(MISCREG_STRAND_STS_REG
));
307 dest
->setMiscRegNoEffect(MISCREG_MMU_P_CONTEXT
,
308 src
->readMiscRegNoEffect(MISCREG_MMU_P_CONTEXT
));
309 dest
->setMiscRegNoEffect(MISCREG_MMU_S_CONTEXT
,
310 src
->readMiscRegNoEffect(MISCREG_MMU_S_CONTEXT
));
311 dest
->setMiscRegNoEffect(MISCREG_MMU_PART_ID
,
312 src
->readMiscRegNoEffect(MISCREG_MMU_PART_ID
));
313 dest
->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL
,
314 src
->readMiscRegNoEffect(MISCREG_MMU_LSU_CTRL
));
316 // Scratchpad Registers
317 dest
->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R0
,
318 src
->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R0
));
319 dest
->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R1
,
320 src
->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R1
));
321 dest
->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R2
,
322 src
->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R2
));
323 dest
->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R3
,
324 src
->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R3
));
325 dest
->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R4
,
326 src
->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R4
));
327 dest
->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R5
,
328 src
->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R5
));
329 dest
->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R6
,
330 src
->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R6
));
331 dest
->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R7
,
332 src
->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R7
));
335 dest
->setMiscRegNoEffect(MISCREG_QUEUE_CPU_MONDO_HEAD
,
336 src
->readMiscRegNoEffect(MISCREG_QUEUE_CPU_MONDO_HEAD
));
337 dest
->setMiscRegNoEffect(MISCREG_QUEUE_CPU_MONDO_TAIL
,
338 src
->readMiscRegNoEffect(MISCREG_QUEUE_CPU_MONDO_TAIL
));
339 dest
->setMiscRegNoEffect(MISCREG_QUEUE_DEV_MONDO_HEAD
,
340 src
->readMiscRegNoEffect(MISCREG_QUEUE_DEV_MONDO_HEAD
));
341 dest
->setMiscRegNoEffect(MISCREG_QUEUE_DEV_MONDO_TAIL
,
342 src
->readMiscRegNoEffect(MISCREG_QUEUE_DEV_MONDO_TAIL
));
343 dest
->setMiscRegNoEffect(MISCREG_QUEUE_RES_ERROR_HEAD
,
344 src
->readMiscRegNoEffect(MISCREG_QUEUE_RES_ERROR_HEAD
));
345 dest
->setMiscRegNoEffect(MISCREG_QUEUE_RES_ERROR_TAIL
,
346 src
->readMiscRegNoEffect(MISCREG_QUEUE_RES_ERROR_TAIL
));
347 dest
->setMiscRegNoEffect(MISCREG_QUEUE_NRES_ERROR_HEAD
,
348 src
->readMiscRegNoEffect(MISCREG_QUEUE_NRES_ERROR_HEAD
));
349 dest
->setMiscRegNoEffect(MISCREG_QUEUE_NRES_ERROR_TAIL
,
350 src
->readMiscRegNoEffect(MISCREG_QUEUE_NRES_ERROR_TAIL
));
353 void SparcISA::copyRegs(ThreadContext
*src
, ThreadContext
*dest
)
355 // First loop through the integer registers.
356 for (int i
= 0; i
< SparcISA::NumIntRegs
; ++i
) {
357 dest
->setIntReg(i
, src
->readIntReg(i
));
360 // Then loop through the floating point registers.
361 for (int i
= 0; i
< SparcISA::NumFloatRegs
; ++i
) {
362 dest
->setFloatRegBits(i
, src
->readFloatRegBits(i
));
365 // Copy misc. registers
366 copyMiscRegs(src
, dest
);
368 // Lastly copy PC/NPC
369 dest
->setPC(src
->readPC());
370 dest
->setNextPC(src
->readNextPC());
371 dest
->setNextNPC(src
->readNextNPC());