src/arch/sparc/regfile.cc

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Ali Saidi
  30  */
  31
  32 #include "arch/sparc/regfile.hh"
  33 #include "cpu/thread_context.hh"
  34
  35 class Checkpoint;
  36
  37 using namespace SparcISA;
  38 using namespace std;
  39
  40 //RegFile class methods
  41 Addr RegFile::readPC()
  42 {
  43     return pc;
  44 }
  45
  46 void RegFile::setPC(Addr val)
  47 {
  48     pc = val;
  49 }
  50
  51 Addr RegFile::readNextPC()
  52 {
  53     return npc;
  54 }
  55
  56 void RegFile::setNextPC(Addr val)
  57 {
  58     npc = val;
  59 }
  60
  61 Addr RegFile::readNextNPC()
  62 {
  63     return nnpc;
  64 }
  65
  66 void RegFile::setNextNPC(Addr val)
  67 {
  68     nnpc = val;
  69 }
  70
  71 void RegFile::clear()
  72 {
  73     floatRegFile.clear();
  74     intRegFile.clear();
  75     miscRegFile.clear();
  76 }
  77
  78 MiscReg RegFile::readMiscReg(int miscReg)
  79 {
  80     return miscRegFile.readReg(miscReg);
  81 }
  82
  83 MiscReg RegFile::readMiscRegWithEffect(int miscReg, ThreadContext *tc)
  84 {
  85     return miscRegFile.readRegWithEffect(miscReg, tc);
  86 }
  87
  88 void RegFile::setMiscReg(int miscReg, const MiscReg &val)
  89 {
  90     miscRegFile.setReg(miscReg, val);
  91 }
  92
  93 void RegFile::setMiscRegWithEffect(int miscReg, const MiscReg &val,
  94         ThreadContext * tc)
  95 {
  96     miscRegFile.setRegWithEffect(miscReg, val, tc);
  97 }
  98
  99 FloatReg RegFile::readFloatReg(int floatReg, int width)
 100 {
 101     return floatRegFile.readReg(floatReg, width);
 102 }
 103
 104 FloatReg RegFile::readFloatReg(int floatReg)
 105 {
 106     //Use the "natural" width of a single float
 107     return floatRegFile.readReg(floatReg, FloatRegFile::SingleWidth);
 108 }
 109
 110 FloatRegBits RegFile::readFloatRegBits(int floatReg, int width)
 111 {
 112     return floatRegFile.readRegBits(floatReg, width);
 113 }
 114
 115 FloatRegBits RegFile::readFloatRegBits(int floatReg)
 116 {
 117     //Use the "natural" width of a single float
 118     return floatRegFile.readRegBits(floatReg,
 119             FloatRegFile::SingleWidth);
 120 }
 121
 122 void RegFile::setFloatReg(int floatReg, const FloatReg &val, int width)
 123 {
 124     floatRegFile.setReg(floatReg, val, width);
 125 }
 126
 127 void RegFile::setFloatReg(int floatReg, const FloatReg &val)
 128 {
 129     //Use the "natural" width of a single float
 130     setFloatReg(floatReg, val, FloatRegFile::SingleWidth);
 131 }
 132
 133 void RegFile::setFloatRegBits(int floatReg, const FloatRegBits &val, int width)
 134 {
 135     floatRegFile.setRegBits(floatReg, val, width);
 136 }
 137
 138 void RegFile::setFloatRegBits(int floatReg, const FloatRegBits &val)
 139 {
 140     //Use the "natural" width of a single float
 141     floatRegFile.setRegBits(floatReg, val, FloatRegFile::SingleWidth);
 142 }
 143
 144 IntReg RegFile::readIntReg(int intReg)
 145 {
 146     return intRegFile.readReg(intReg);
 147 }
 148
 149 void RegFile::setIntReg(int intReg, const IntReg &val)
 150 {
 151     intRegFile.setReg(intReg, val);
 152 }
 153
 154 int SparcISA::flattenIntIndex(ThreadContext * tc, int reg)
 155 {
 156     int gl = tc->readMiscReg(MISCREG_GL);
 157     int cwp = tc->readMiscReg(MISCREG_CWP);
 158     //DPRINTF(Sparc, "Global Level = %d, Current Window Pointer = %d\n", gl, cwp);
 159     int newReg;
 160     if(reg < 8)
 161     {
 162         //Global register
 163         //Put it in the appropriate set of globals
 164         newReg = reg + gl * 8;
 165     }
 166     else if(reg < NumIntArchRegs)
 167     {
 168         //Regular windowed register
 169         //Put it in the window pointed to by cwp
 170         newReg = MaxGL * 8 +
 171             ((reg - 8 - cwp * 16 + NWindows * 16) % (NWindows * 16));
 172     }
 173     else if(reg < NumIntArchRegs + NumMicroIntRegs)
 174     {
 175         //Microcode register
 176         //Displace from the end of the regular registers
 177         newReg = reg - NumIntArchRegs + MaxGL * 8 + NWindows * 16;
 178     }
 179     else if(reg < 2 * NumIntArchRegs + NumMicroIntRegs)
 180     {
 181         reg -= (NumIntArchRegs + NumMicroIntRegs);
 182         if(reg < 8)
 183         {
 184             //Global register from the next window
 185             //Put it in the appropriate set of globals
 186             newReg = reg + gl * 8;
 187         }
 188         else
 189         {
 190             //Windowed register from the previous window
 191             //Put it in the window before the one pointed to by cwp
 192             newReg = MaxGL * 8 +
 193                 ((reg - 8 - (cwp - 1) * 16 + NWindows * 16) % (NWindows * 16));
 194         }
 195     }
 196     else if(reg < 3 * NumIntArchRegs + NumMicroIntRegs)
 197     {
 198         reg -= (2 * NumIntArchRegs + NumMicroIntRegs);
 199         if(reg < 8)
 200         {
 201             //Global register from the previous window
 202             //Put it in the appropriate set of globals
 203             newReg = reg + gl * 8;
 204         }
 205         else
 206         {
 207             //Windowed register from the next window
 208             //Put it in the window after the one pointed to by cwp
 209             newReg = MaxGL * 8 +
 210                 ((reg - 8 - (cwp + 1) * 16 + NWindows * 16) % (NWindows * 16));
 211         }
 212     }
 213     else
 214         panic("Tried to flatten invalid register index %d!\n", reg);
 215     DPRINTF(Sparc, "Flattened register %d to %d.\n", reg, newReg);
 216     return newReg;
 217     //return intRegFile.flattenIndex(reg);
 218 }
 219
 220 void RegFile::serialize(std::ostream &os)
 221 {
 222     intRegFile.serialize(os);
 223     floatRegFile.serialize(os);
 224     miscRegFile.serialize(os);
 225     SERIALIZE_SCALAR(pc);
 226     SERIALIZE_SCALAR(npc);
 227 }
 228
 229 void RegFile::unserialize(Checkpoint *cp, const std::string &section)
 230 {
 231     intRegFile.unserialize(cp, section);
 232     floatRegFile.unserialize(cp, section);
 233     miscRegFile.unserialize(cp, section);
 234     UNSERIALIZE_SCALAR(pc);
 235     UNSERIALIZE_SCALAR(npc);
 236 }
 237
 238 void RegFile::changeContext(RegContextParam param, RegContextVal val)
 239 {
 240     switch(param)
 241     {
 242       case CONTEXT_CWP:
 243         intRegFile.setCWP(val);
 244         break;
 245       case CONTEXT_GLOBALS:
 246         intRegFile.setGlobals(val);
 247         break;
 248       default:
 249         panic("Tried to set illegal context parameter in the SPARC regfile.\n");
 250     }
 251 }
 252
 253 int SparcISA::InterruptLevel(uint64_t softint)
 254 {
 255     if (softint & 0x10000 || softint & 0x1)
 256         return 14;
 257
 258     int level = 14;
 259     while (level >= 0 && !(1 << (level + 1) & softint))
 260         level--;
 261     if (1 << (level + 1) & softint)
 262         return level;
 263     return 0;
 264 }
 265
 266 void SparcISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest)
 267 {
 268
 269     uint8_t tl = src->readMiscReg(MISCREG_TL);
 270
 271     // Read all the trap level dependent registers and save them off
 272     for(int i = 1; i <= MaxTL; i++)
 273     {
 274         src->setMiscReg(MISCREG_TL, i);
 275         dest->setMiscReg(MISCREG_TL, i);
 276
 277         dest->setMiscReg(MISCREG_TT, src->readMiscReg(MISCREG_TT));
 278         dest->setMiscReg(MISCREG_TPC, src->readMiscReg(MISCREG_TPC));
 279         dest->setMiscReg(MISCREG_TNPC, src->readMiscReg(MISCREG_TNPC));
 280         dest->setMiscReg(MISCREG_TSTATE, src->readMiscReg(MISCREG_TSTATE));
 281     }
 282
 283     // Save off the traplevel
 284     dest->setMiscReg(MISCREG_TL, tl);
 285     src->setMiscReg(MISCREG_TL, tl);
 286
 287
 288     // ASRs
 289 //    dest->setMiscReg(MISCREG_Y, src->readMiscReg(MISCREG_Y));
 290 //    dest->setMiscReg(MISCREG_CCR, src->readMiscReg(MISCREG_CCR));
 291     dest->setMiscReg(MISCREG_ASI, src->readMiscReg(MISCREG_ASI));
 292     dest->setMiscReg(MISCREG_TICK, src->readMiscReg(MISCREG_TICK));
 293     dest->setMiscReg(MISCREG_FPRS, src->readMiscReg(MISCREG_FPRS));
 294     dest->setMiscReg(MISCREG_SOFTINT, src->readMiscReg(MISCREG_SOFTINT));
 295     dest->setMiscReg(MISCREG_TICK_CMPR, src->readMiscReg(MISCREG_TICK_CMPR));
 296     dest->setMiscReg(MISCREG_STICK, src->readMiscReg(MISCREG_STICK));
 297     dest->setMiscReg(MISCREG_STICK_CMPR, src->readMiscReg(MISCREG_STICK_CMPR));
 298
 299     // Priv Registers
 300     dest->setMiscReg(MISCREG_TICK, src->readMiscReg(MISCREG_TICK));
 301     dest->setMiscReg(MISCREG_TBA, src->readMiscReg(MISCREG_TBA));
 302     dest->setMiscReg(MISCREG_PSTATE, src->readMiscReg(MISCREG_PSTATE));
 303     dest->setMiscReg(MISCREG_PIL, src->readMiscReg(MISCREG_PIL));
 304     dest->setMiscReg(MISCREG_CWP, src->readMiscReg(MISCREG_CWP));
 305 //    dest->setMiscReg(MISCREG_CANSAVE, src->readMiscReg(MISCREG_CANSAVE));
 306 //    dest->setMiscReg(MISCREG_CANRESTORE, src->readMiscReg(MISCREG_CANRESTORE));
 307 //    dest->setMiscReg(MISCREG_OTHERWIN, src->readMiscReg(MISCREG_OTHERWIN));
 308 //    dest->setMiscReg(MISCREG_CLEANWIN, src->readMiscReg(MISCREG_CLEANWIN));
 309 //    dest->setMiscReg(MISCREG_WSTATE, src->readMiscReg(MISCREG_WSTATE));
 310     dest->setMiscReg(MISCREG_GL, src->readMiscReg(MISCREG_GL));
 311
 312     // Hyperprivilged registers
 313     dest->setMiscReg(MISCREG_HPSTATE, src->readMiscReg(MISCREG_HPSTATE));
 314     dest->setMiscReg(MISCREG_HINTP, src->readMiscReg(MISCREG_HINTP));
 315     dest->setMiscReg(MISCREG_HTBA, src->readMiscReg(MISCREG_HTBA));
 316     dest->setMiscReg(MISCREG_STRAND_STS_REG,
 317             src->readMiscReg(MISCREG_STRAND_STS_REG));
 318     dest->setMiscReg(MISCREG_HSTICK_CMPR,
 319             src->readMiscReg(MISCREG_HSTICK_CMPR));
 320
 321     // FSR
 322     dest->setMiscReg(MISCREG_FSR, src->readMiscReg(MISCREG_FSR));
 323 }
 324
 325 void SparcISA::copyRegs(ThreadContext *src, ThreadContext *dest)
 326 {
 327     // First loop through the integer registers.
 328     for (int i = 0; i < TheISA::NumIntRegs; ++i) {
 329         dest->setIntReg(i, src->readIntReg(i));
 330     }
 331
 332     // Then loop through the floating point registers.
 333     for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
 334         dest->setFloatRegBits(i, src->readFloatRegBits(i));
 335     }
 336
 337     // Copy misc. registers
 338     copyMiscRegs(src, dest);
 339
 340     // Lastly copy PC/NPC
 341     dest->setPC(src->readPC());
 342     dest->setNextPC(src->readNextPC());
 343     dest->setNextNPC(src->readNextNPC());
 344 }