src/arch/sparc/registers.hh

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Ali Saidi
  30  */
  31
  32 #ifndef __ARCH_SPARC_REGISTERS_HH__
  33 #define __ARCH_SPARC_REGISTERS_HH__
  34
  35 #include "arch/sparc/generated/max_inst_regs.hh"
  36 #include "arch/sparc/miscregs.hh"
  37 #include "arch/sparc/sparc_traits.hh"
  38 #include "base/types.hh"
  39
  40 namespace SparcISA
  41 {
  42
  43 using SparcISAInst::MaxInstSrcRegs;
  44 using SparcISAInst::MaxInstDestRegs;
  45 using SparcISAInst::MaxMiscDestRegs;
  46
  47 typedef uint64_t IntReg;
  48 typedef uint64_t MiscReg;
  49 typedef float FloatReg;
  50 typedef uint32_t FloatRegBits;
  51
  52 // dummy typedef since we don't have CC regs
  53 typedef uint8_t CCReg;
  54
  55 typedef union
  56 {
  57     IntReg intReg;
  58     FloatReg fpreg;
  59     MiscReg ctrlreg;
  60 } AnyReg;
  61
  62 typedef uint16_t RegIndex;
  63
  64 // semantically meaningful register indices
  65 const int ZeroReg = 0;      // architecturally meaningful
  66 // the rest of these depend on the ABI
  67 const int ReturnAddressReg = 31; // post call, precall is 15
  68 const int ReturnValueReg = 8;  // Post return, 24 is pre-return.
  69 const int StackPointerReg = 14;
  70 const int FramePointerReg = 30;
  71
  72 // Some OS syscall use a second register (o1) to return a second value
  73 const int SyscallPseudoReturnReg = 9;
  74
  75 const int NumIntArchRegs = 32;
  76 const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs;
  77 const int NumCCRegs = 0;
  78
  79 const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs;
  80
  81 // These enumerate all the registers for dependence tracking.
  82 enum DependenceTags {
  83     FP_Reg_Base = NumIntRegs,
  84     CC_Reg_Base = FP_Reg_Base + NumFloatRegs,
  85     Misc_Reg_Base = CC_Reg_Base + NumCCRegs, // NumCCRegs == 0
  86     Max_Reg_Index = Misc_Reg_Base + NumMiscRegs,
  87 };
  88
  89 } // namespace SparcISA
  90
  91 #endif