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31 #ifndef __ARCH_SPARC_TLB_HH__
32 #define __ARCH_SPARC_TLB_HH__
34 #include "arch/sparc/tlb_map.hh"
35 #include "base/misc.hh"
36 #include "mem/request.hh"
37 #include "sim/faults.hh"
38 #include "sim/sim_object.hh"
46 class TLB : public SimObject
50 typedef TlbMap::iterator MapIter;
65 VaOutOfRangeJmp = 0x40
75 /** lookup an entry in the TLB based on the partition id, and real bit if
76 * real is true or the partition id, and context id if real is false.
77 * @param va the virtual address not shifted (e.g. bottom 13 bits are 0)
78 * @param paritition_id partition this entry is for
79 * @param real is this a real->phys or virt->phys translation
80 * @param context_id if this is virt->phys what context
81 * @return A pointer to a tlb entry
83 TlbEntry *lookup(Addr va, int partition_id, bool real, int context_id = 0);
85 /** Insert a PTE into the TLB. */
86 void insert(Addr vpn, int partition_id, int context_id, bool real,
87 const PageTableEntry& PTE, int entry = -1);
89 /** Given an entry id, read that tlb entries' tag. */
90 uint64_t TagRead(int entry);
92 /** Give an entry id, read that tlb entries' tte */
93 uint64_t TteRead(int entry);
95 /** Remove all entries from the TLB */
98 /** Remove all non-locked entries from the tlb that match partition id. */
99 void demapAll(int partition_id);
101 /** Remove all entries that match a given context/partition id. */
102 void demapContext(int partition_id, int context_id);
104 /** Remve all entries that match a certain partition id, (contextid), and
106 void demapPage(Addr va, int partition_id, bool real, int context_id);
108 /** Checks if the virtual address provided is a valid one. */
109 bool validVirtualAddress(Addr va, bool am);
111 void writeSfsr(ThreadContext *tc, int reg, bool write, ContextType ct,
112 bool se, FaultTypes ft, int asi);
114 void clearUsedBits();
117 void writeTagAccess(ThreadContext *tc, int reg, Addr va, int context);
120 TLB(const std::string &name, int size);
125 virtual void serialize(std::ostream &os);
126 virtual void unserialize(Checkpoint *cp, const std::string §ion);
129 class ITB : public TLB
132 ITB(const std::string &name, int size) : TLB(name, size)
136 Fault translate(RequestPtr &req, ThreadContext *tc);
138 void writeSfsr(ThreadContext *tc, bool write, ContextType ct,
139 bool se, FaultTypes ft, int asi);
140 void writeTagAccess(ThreadContext *tc, Addr va, int context);
144 class DTB : public TLB
147 DTB(const std::string &name, int size) : TLB(name, size)
151 Fault translate(RequestPtr &req, ThreadContext *tc, bool write);
152 Tick doMmuRegRead(ThreadContext *tc, Packet *pkt);
153 Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt);
156 void writeSfr(ThreadContext *tc, Addr a, bool write, ContextType ct,
157 bool se, FaultTypes ft, int asi);
158 void writeTagAccess(ThreadContext *tc, Addr va, int context);
165 #endif // __ARCH_SPARC_TLB_HH__