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33 #include "arch/sparc/tlb.hh"
34 #include "arch/sparc/vtophys.hh"
35 #include "base/chunk_generator.hh"
36 #include "base/compiler.hh"
37 #include "base/trace.hh"
38 #include "cpu/thread_context.hh"
39 #include "debug/VtoPhys.hh"
40 #include "mem/port_proxy.hh"
49 // In SPARC it's almost always impossible to turn a VA->PA w/o a
50 // context The only times we can kinda do it are if we have a
51 // SegKPM mapping and can find the real address in the tlb or we
52 // have a physical adddress already (beacuse we are looking at the
53 // hypervisor) Either case is rare, so we'll just panic.
55 panic("vtophys() without context on SPARC largly worthless\n");
60 vtophys(ThreadContext
*tc
, Addr addr
)
62 // Here we have many options and are really implementing something like
63 // a fill handler to find the address since there isn't a multilevel
64 // table for us to walk around.
66 // 1. We are currently hyperpriv, return the address unmodified
67 // 2. The mmu is off return(ra->pa)
68 // 3. We are currently priv, use ctx0* tsbs to find the page
69 // 4. We are not priv, use ctxN0* tsbs to find the page
70 // For all accesses we check the tlbs first since it's possible that
71 // long standing pages (e.g. locked kernel mappings) won't be in the tsb
72 uint64_t tlbdata
= tc
->readMiscRegNoEffect(MISCREG_TLB_DATA
);
74 bool hpriv
= bits(tlbdata
,0,0);
75 // bool priv = bits(tlbdata,2,2);
76 bool addr_mask
= bits(tlbdata
,3,3);
77 bool data_real
= !bits(tlbdata
,5,5);
78 bool inst_real
= !bits(tlbdata
,4,4);
79 bool ctx_zero
= bits(tlbdata
,18,16) > 0;
80 int part_id
= bits(tlbdata
,15,8);
81 int pri_context
= bits(tlbdata
,47,32);
82 // int sec_context = bits(tlbdata,63,48);
84 PortProxy
&mem
= tc
->getPhysProxy();
85 TLB
* itb
= tc
->getITBPtr();
86 TLB
* dtb
= tc
->getDTBPtr();
97 addr
= addr
& VAddrAMask
;
99 tbe
= dtb
->lookup(addr
, part_id
, data_real
, ctx_zero
? 0 : pri_context
,
104 tbe
= itb
->lookup(addr
, part_id
, inst_real
, ctx_zero
? 0 : pri_context
,
109 // We didn't find it in the tlbs, so lets look at the TSBs
110 dtb
->GetTsbPtr(tc
, addr
, ctx_zero
? 0 : pri_context
, tsbs
);
111 va_tag
= bits(addr
, 63, 22);
112 for (int x
= 0; x
< 4; x
++) {
113 ttetag
= betoh(mem
.read
<uint64_t>(tsbs
[x
]));
114 if (ttetag
.valid() && ttetag
.va() == va_tag
) {
115 uint64_t entry
= mem
.read
<uint64_t>(tsbs
[x
]) + sizeof(uint64_t);
116 // I think it's sun4v at least!
117 pte
.populate(betoh(entry
), PageTableEntry::sun4v
);
118 DPRINTF(VtoPhys
, "Virtual(%#x)->Physical(%#x) found in TTE\n",
119 addr
, pte
.translate(addr
));
123 panic("couldn't translate %#x\n", addr
);
127 DPRINTF(VtoPhys
, "Virtual(%#x)->Physical(%#x) found in TLB\n", addr
,
128 pte
.translate(addr
));
130 return pte
.translate(addr
);
133 } // namespace SparcISA