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41 from m5
.defines
import buildEnv
42 from m5
.params
import *
43 from m5
.proxy
import *
45 from m5
.objects
.BaseInterrupts
import BaseInterrupts
46 from m5
.objects
.ClockDomain
import DerivedClockDomain
47 from m5
.SimObject
import SimObject
49 class X86LocalApic(BaseInterrupts
):
51 cxx_class
= 'X86ISA::Interrupts'
52 cxx_header
= 'arch/x86/interrupts.hh'
53 int_master
= MasterPort("Port for sending interrupt messages")
54 int_slave
= SlavePort("Port for receiving interrupt messages")
55 int_latency
= Param
.Latency('1ns', \
56 "Latency for an interrupt to propagate through this device.")
57 pio
= SlavePort("Programmed I/O port")
58 system
= Param
.System(Parent
.any
, "System this device is part of")
60 pio_latency
= Param
.Latency('100ns', 'Programmed IO latency')
62 # The clock rate for the local APIC timer is supposed to be the "bus clock"
63 # which we assume is 1/16th the rate of the CPU clock. I don't think this
64 # is a hard rule, but seems to be true in practice. This can be overriden
65 # in configs that use it.
66 clk_domain
= Param
.DerivedClockDomain(
67 DerivedClockDomain(clk_domain
=Parent
.clk_domain
, clk_divider
=16),
68 "The clock for the local APIC. Should not be modified.")