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31 #ifndef __ARCH_X86_APICREGS_HH__
32 #define __ARCH_X86_APICREGS_HH__
34 #include "base/bitunion.hh"
43 APIC_ARBITRATION_PRIORITY,
44 APIC_PROCESSOR_PRIORITY,
46 APIC_LOGICAL_DESTINATION,
47 APIC_DESTINATION_FORMAT,
48 APIC_SPURIOUS_INTERRUPT_VECTOR,
52 APIC_TRIGGER_MODE_BASE = APIC_IN_SERVICE_BASE + 16,
54 APIC_INTERRUPT_REQUEST_BASE = APIC_TRIGGER_MODE_BASE + 16,
56 APIC_ERROR_STATUS = APIC_INTERRUPT_REQUEST_BASE + 16,
57 APIC_INTERRUPT_COMMAND_LOW,
58 APIC_INTERRUPT_COMMAND_HIGH,
60 APIC_LVT_THERMAL_SENSOR,
61 APIC_LVT_PERFORMANCE_MONITORING_COUNTERS,
67 APIC_DIVIDE_CONFIGURATION,
74 static inline ApicRegIndex
75 APIC_IN_SERVICE(int index)
77 return (ApicRegIndex)(APIC_IN_SERVICE_BASE + index);
80 static inline ApicRegIndex
81 APIC_TRIGGER_MODE(int index)
83 return (ApicRegIndex)(APIC_TRIGGER_MODE_BASE + index);
86 static inline ApicRegIndex
87 APIC_INTERRUPT_REQUEST(int index)
89 return (ApicRegIndex)(APIC_INTERRUPT_REQUEST_BASE + index);
92 BitUnion32(InterruptCommandRegLow)
93 Bitfield<7, 0> vector;
94 Bitfield<10, 8> deliveryMode;
95 Bitfield<11> destMode;
96 Bitfield<12> deliveryStatus;
99 Bitfield<19, 18> destShorthand;
100 EndBitUnion(InterruptCommandRegLow)
102 BitUnion32(InterruptCommandRegHigh)
103 Bitfield<31, 24> destination;
104 EndBitUnion(InterruptCommandRegHigh)