1 # Copyright (c) 2008 The Hewlett-Packard Development Company
4 # The license below extends only to copyright in the software and shall
5 # not be construed as granting a license to any other intellectual
6 # property including but not limited to intellectual property relating
7 # to a hardware implementation of the functionality of the software
8 # licensed hereunder. You may use the software subject to the license
9 # terms below provided that you ensure that this notice is replicated
10 # unmodified and in its entirety in all distributions of the software,
11 # modified or unmodified, in source code or in binary form.
13 # Redistribution and use in source and binary forms, with or without
14 # modification, are permitted provided that the following conditions are
15 # met: redistributions of source code must retain the above copyright
16 # notice, this list of conditions and the following disclaimer;
17 # redistributions in binary form must reproduce the above copyright
18 # notice, this list of conditions and the following disclaimer in the
19 # documentation and/or other materials provided with the distribution;
20 # neither the name of the copyright holders nor the names of its
21 # contributors may be used to endorse or promote products derived from
22 # this software without specific prior written permission.
24 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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34 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 from m5
.params
import *
39 from m5
.SimObject
import SimObject
41 class X86IntelMPFloatingPointer(SimObject
):
42 type = 'X86IntelMPFloatingPointer'
43 cxx_class
= 'X86ISA::IntelMP::FloatingPointer'
44 cxx_header
= 'arch/x86/bios/intelmp.hh'
46 # The minor revision of the spec to support. The major version is assumed
47 # to be 1 in accordance with the spec.
48 spec_rev
= Param
.UInt8(4, 'minor revision of the MP spec supported')
49 # If no default configuration is used, set this to 0.
50 default_config
= Param
.UInt8(0, 'which default configuration to use')
51 imcr_present
= Param
.Bool(True,
52 'whether the IMCR register is present in the APIC')
54 class X86IntelMPConfigTable(SimObject
):
55 type = 'X86IntelMPConfigTable'
56 cxx_class
= 'X86ISA::IntelMP::ConfigTable'
57 cxx_header
= 'arch/x86/bios/intelmp.hh'
59 spec_rev
= Param
.UInt8(4, 'minor revision of the MP spec supported')
60 oem_id
= Param
.String("", 'system manufacturer')
61 product_id
= Param
.String("", 'product family')
62 oem_table_addr
= Param
.UInt32(0,
63 'pointer to the optional oem configuration table')
64 oem_table_size
= Param
.UInt16(0, 'size of the oem configuration table')
65 local_apic
= Param
.UInt32(0xFEE00000, 'address of the local APIC')
67 base_entries
= VectorParam
.X86IntelMPBaseConfigEntry([],
68 'base configuration table entries')
70 ext_entries
= VectorParam
.X86IntelMPExtConfigEntry([],
71 'extended configuration table entries')
73 def add_entry(self
, entry
):
74 if isinstance(entry
, X86IntelMPBaseConfigEntry
):
75 self
.base_entries
.append(entry
)
76 elif isinstance(entry
, X86IntelMPExtConfigEntry
):
77 self
.ext_entries
.append(entry
)
79 panic("Don't know what type of Intel MP entry %s is." \
80 % entry
.__class
__.__name
__)
82 class X86IntelMPBaseConfigEntry(SimObject
):
83 type = 'X86IntelMPBaseConfigEntry'
84 cxx_class
= 'X86ISA::IntelMP::BaseConfigEntry'
85 cxx_header
= 'arch/x86/bios/intelmp.hh'
88 class X86IntelMPExtConfigEntry(SimObject
):
89 type = 'X86IntelMPExtConfigEntry'
90 cxx_class
= 'X86ISA::IntelMP::ExtConfigEntry'
91 cxx_header
= 'arch/x86/bios/intelmp.hh'
94 class X86IntelMPProcessor(X86IntelMPBaseConfigEntry
):
95 type = 'X86IntelMPProcessor'
96 cxx_class
= 'X86ISA::IntelMP::Processor'
97 cxx_header
= 'arch/x86/bios/intelmp.hh'
99 local_apic_id
= Param
.UInt8(0, 'local APIC id')
100 local_apic_version
= Param
.UInt8(0,
101 'bits 0-7 of the local APIC version register')
102 enable
= Param
.Bool(True, 'if this processor is usable')
103 bootstrap
= Param
.Bool(False, 'if this is the bootstrap processor')
105 stepping
= Param
.UInt8(0, 'Processor stepping')
106 model
= Param
.UInt8(0, 'Processor model')
107 family
= Param
.UInt8(0, 'Processor family')
109 feature_flags
= Param
.UInt32(0, 'flags returned by the CPUID instruction')
111 class X86IntelMPBus(X86IntelMPBaseConfigEntry
):
112 type = 'X86IntelMPBus'
113 cxx_class
= 'X86ISA::IntelMP::Bus'
114 cxx_header
= 'arch/x86/bios/intelmp.hh'
116 bus_id
= Param
.UInt8(0, 'bus id assigned by the bios')
117 bus_type
= Param
.String("", 'string that identify the bus type')
118 # Legal values for bus_type are [space padded to 6 bytes]:
120 # "CBUS", "CBUSII", "EISA", "FUTURE", "INTERN", "ISA", "MBI", "MBII",
121 # "MCA", "MPI", "MPSA", "NUBUS", "PCI", "PCMCIA", "TC", "VL", "VME",
124 class X86IntelMPIOAPIC(X86IntelMPBaseConfigEntry
):
125 type = 'X86IntelMPIOAPIC'
126 cxx_class
= 'X86ISA::IntelMP::IOAPIC'
127 cxx_header
= 'arch/x86/bios/intelmp.hh'
129 id = Param
.UInt8(0, 'id of this APIC')
130 version
= Param
.UInt8(0, 'bits 0-7 of the version register')
132 enable
= Param
.Bool(True, 'if this APIC is usable')
134 address
= Param
.UInt32(0xfec00000, 'address of this APIC')
136 class X86IntelMPInterruptType(Enum
):
143 class X86IntelMPPolarity(Enum
):
144 map = {'ConformPolarity' : 0,
149 class X86IntelMPTriggerMode(Enum
):
150 map = {'ConformTrigger' : 0,
155 class X86IntelMPIOIntAssignment(X86IntelMPBaseConfigEntry
):
156 type = 'X86IntelMPIOIntAssignment'
157 cxx_class
= 'X86ISA::IntelMP::IOIntAssignment'
158 cxx_header
= 'arch/x86/bios/intelmp.hh'
160 interrupt_type
= Param
.X86IntelMPInterruptType('INT', 'type of interrupt')
162 polarity
= Param
.X86IntelMPPolarity('ConformPolarity', 'polarity')
163 trigger
= Param
.X86IntelMPTriggerMode('ConformTrigger', 'trigger mode')
165 source_bus_id
= Param
.UInt8(0,
166 'id of the bus from which the interrupt signal comes')
167 source_bus_irq
= Param
.UInt8(0,
168 'which interrupt signal from the source bus')
170 dest_io_apic_id
= Param
.UInt8(0,
171 'id of the IO APIC the interrupt is going to')
172 dest_io_apic_intin
= Param
.UInt8(0,
173 'the INTIN pin on the IO APIC the interrupt is connected to')
175 class X86IntelMPLocalIntAssignment(X86IntelMPBaseConfigEntry
):
176 type = 'X86IntelMPLocalIntAssignment'
177 cxx_class
= 'X86ISA::IntelMP::LocalIntAssignment'
178 cxx_header
= 'arch/x86/bios/intelmp.hh'
180 interrupt_type
= Param
.X86IntelMPInterruptType('INT', 'type of interrupt')
182 polarity
= Param
.X86IntelMPPolarity('ConformPolarity', 'polarity')
183 trigger
= Param
.X86IntelMPTriggerMode('ConformTrigger', 'trigger mode')
185 source_bus_id
= Param
.UInt8(0,
186 'id of the bus from which the interrupt signal comes')
187 source_bus_irq
= Param
.UInt8(0,
188 'which interrupt signal from the source bus')
190 dest_local_apic_id
= Param
.UInt8(0,
191 'id of the local APIC the interrupt is going to')
192 dest_local_apic_intin
= Param
.UInt8(0,
193 'the INTIN pin on the local APIC the interrupt is connected to')
195 class X86IntelMPAddressType(Enum
):
196 map = {"IOAddress" : 0,
198 "PrefetchAddress" : 2
201 class X86IntelMPAddrSpaceMapping(X86IntelMPExtConfigEntry
):
202 type = 'X86IntelMPAddrSpaceMapping'
203 cxx_class
= 'X86ISA::IntelMP::AddrSpaceMapping'
204 cxx_header
= 'arch/x86/bios/intelmp.hh'
206 bus_id
= Param
.UInt8(0, 'id of the bus the address space is mapped to')
207 address_type
= Param
.X86IntelMPAddressType('IOAddress',
208 'address type used to access bus')
209 address
= Param
.Addr(0, 'starting address of the mapping')
210 length
= Param
.UInt64(0, 'length of mapping in bytes')
212 class X86IntelMPBusHierarchy(X86IntelMPExtConfigEntry
):
213 type = 'X86IntelMPBusHierarchy'
214 cxx_class
= 'X86ISA::IntelMP::BusHierarchy'
215 cxx_header
= 'arch/x86/bios/intelmp.hh'
217 bus_id
= Param
.UInt8(0, 'id of the bus being described')
218 subtractive_decode
= Param
.Bool(False,
219 'whether this bus contains all addresses not used by its children')
220 parent_bus
= Param
.UInt8(0, 'bus id of this busses parent')
222 class X86IntelMPRangeList(Enum
):
223 map = {"ISACompatible" : 0,
227 class X86IntelMPCompatAddrSpaceMod(X86IntelMPExtConfigEntry
):
228 type = 'X86IntelMPCompatAddrSpaceMod'
229 cxx_class
= 'X86ISA::IntelMP::CompatAddrSpaceMod'
230 cxx_header
= 'arch/x86/bios/intelmp.hh'
232 bus_id
= Param
.UInt8(0, 'id of the bus being described')
233 add
= Param
.Bool(False,
234 'if the range should be added to the original mapping')
235 range_list
= Param
.X86IntelMPRangeList('ISACompatible',
236 'which predefined range of addresses to use')