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31 #ifndef __ARCH_X86_DECODER_HH__
32 #define __ARCH_X86_DECODER_HH__
35 #include <unordered_map>
38 #include "arch/x86/regs/misc.hh"
39 #include "arch/x86/types.hh"
40 #include "base/bitfield.hh"
41 #include "base/misc.hh"
42 #include "base/trace.hh"
43 #include "base/types.hh"
44 #include "cpu/decode_cache.hh"
45 #include "cpu/static_inst.hh"
46 #include "debug/Decoder.hh"
55 //These are defined and documented in decoder_tables.cc
56 static const uint8_t SizeTypeToSize[3][10];
57 typedef const uint8_t ByteTable[256];
58 static ByteTable Prefixes;
60 static ByteTable UsesModRMOneByte;
61 static ByteTable UsesModRMTwoByte;
62 static ByteTable UsesModRMThreeByte0F38;
63 static ByteTable UsesModRMThreeByte0F3A;
65 static ByteTable ImmediateTypeOneByte;
66 static ByteTable ImmediateTypeTwoByte;
67 static ByteTable ImmediateTypeThreeByte0F38;
68 static ByteTable ImmediateTypeThreeByte0F3A;
69 static ByteTable ImmediateTypeVex[10];
75 std::vector<MachInst> chunks;
76 std::vector<MachInst> masks;
79 InstBytes() : lastOffset(0)
83 static InstBytes dummy;
85 //The bytes to be predecoded
89 //The pc of the start of fetchChunk
91 //The pc the current instruction started at
93 //The offset into fetchChunk of current processing
95 //The extended machine instruction being generated
106 uint8_t getNextByte()
108 return ((uint8_t *)&fetchChunk)[offset];
111 void getImmediate(int &collected, uint64_t ¤t, int size)
113 //Figure out how many bytes we still need to get for the
115 int toGet = size - collected;
116 //Figure out how many bytes are left in our "buffer"
117 int remaining = sizeof(MachInst) - offset;
118 //Get as much as we need, up to the amount available.
119 toGet = toGet > remaining ? remaining : toGet;
121 //Shift the bytes we want to be all the way to the right
122 uint64_t partialImm = fetchChunk >> (offset * 8);
123 //Mask off what we don't want
124 partialImm &= mask(toGet * 8);
125 //Shift it over to overlay with our displacement.
126 partialImm <<= (immediateCollected * 8);
127 //Put it into our displacement
128 current |= partialImm;
129 //Update how many bytes we've collected.
134 void updateOffsetState()
136 assert(offset <= sizeof(MachInst));
137 if (offset == sizeof(MachInst)) {
138 DPRINTF(Decoder, "At the end of a chunk, idx = %d, chunks = %d.\n",
139 chunkIdx, instBytes->chunks.size());
141 if (chunkIdx == instBytes->chunks.size()) {
145 fetchChunk = instBytes->chunks[chunkIdx];
146 basePC += sizeof(MachInst);
157 void consumeBytes(int numBytes)
163 //State machine state
165 //Whether or not we're out of bytes
167 //Whether we've completed generating an ExtMachInst
169 //The size of the displacement value
170 int displacementSize;
171 //The size of the immediate value
173 //This is how much of any immediate value we've gotten. This is used
174 //for both the actual immediate and the displacement.
175 int immediateCollected;
182 ThreeByteVexFirstState,
183 ThreeByteVexSecondState,
186 ThreeByte0F38OpcodeState,
187 ThreeByte0F3AOpcodeState,
192 //We should never get to this state. Getting here is an error.
198 //Functions to handle each of the states
199 State doResetState();
200 State doFromCacheState();
201 State doPrefixState(uint8_t);
202 State doTwoByteVexState(uint8_t);
203 State doThreeByteVexFirstState(uint8_t);
204 State doThreeByteVexSecondState(uint8_t);
205 State doOneByteOpcodeState(uint8_t);
206 State doTwoByteOpcodeState(uint8_t);
207 State doThreeByte0F38OpcodeState(uint8_t);
208 State doThreeByte0F3AOpcodeState(uint8_t);
209 State doModRMState(uint8_t);
210 State doSIBState(uint8_t);
211 State doDisplacementState();
212 State doImmediateState();
214 //Process the actual opcode found earlier, using the supplied tables.
215 State processOpcode(ByteTable &immTable, ByteTable &modrmTable,
216 bool addrSizedImm = false);
217 // Process the opcode found with VEX / XOP prefix.
218 State processExtendedOpcode(ByteTable &immTable);
221 /// Caching for decoded instruction objects.
223 typedef MiscReg CacheKey;
225 typedef DecodeCache::AddrMap<Decoder::InstBytes> DecodePages;
226 DecodePages *decodePages;
227 typedef std::unordered_map<CacheKey, DecodePages *> AddrCacheMap;
228 AddrCacheMap addrCacheMap;
230 DecodeCache::InstMap *instMap;
231 typedef std::unordered_map<CacheKey, DecodeCache::InstMap *> InstCacheMap;
232 static InstCacheMap instCacheMap;
235 Decoder(ISA* isa = nullptr) : basePC(0), origPC(0), offset(0),
236 outOfBytes(true), instDone(false),
239 memset(&emi, 0, sizeof(emi));
241 submode = SixtyFourBitMode;
242 emi.mode.mode = mode;
243 emi.mode.submode = submode;
254 void setM5Reg(HandyM5Reg m5Reg)
256 mode = (X86Mode)(uint64_t)m5Reg.mode;
257 submode = (X86SubMode)(uint64_t)m5Reg.submode;
258 emi.mode.mode = mode;
259 emi.mode.submode = submode;
262 altAddr = m5Reg.altAddr;
263 defAddr = m5Reg.defAddr;
266 AddrCacheMap::iterator amIter = addrCacheMap.find(m5Reg);
267 if (amIter != addrCacheMap.end()) {
268 decodePages = amIter->second;
270 decodePages = new DecodePages;
271 addrCacheMap[m5Reg] = decodePages;
274 InstCacheMap::iterator imIter = instCacheMap.find(m5Reg);
275 if (imIter != instCacheMap.end()) {
276 instMap = imIter->second;
278 instMap = new DecodeCache::InstMap;
279 instCacheMap[m5Reg] = instMap;
283 void takeOverFrom(Decoder *old)
286 submode = old->submode;
287 emi.mode.mode = mode;
288 emi.mode.submode = submode;
291 altAddr = old->altAddr;
292 defAddr = old->defAddr;
303 //Use this to give data to the decoder. This should be used
304 //when there is control flow.
305 void moreBytes(const PCState &pc, Addr fetchPC, MachInst data)
307 DPRINTF(Decoder, "Getting more bytes.\n");
309 offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
326 updateNPC(X86ISA::PCState &nextPC)
328 if (!nextPC.size()) {
329 int size = basePC + offset - origPC;
331 "Calculating the instruction size: "
332 "basePC: %#x offset: %#x origPC: %#x size: %d\n",
333 basePC, offset, origPC, size);
335 nextPC.npc(nextPC.pc() + size);
340 StaticInstPtr decodeInst(ExtMachInst mach_inst);
342 /// Decode a machine instruction.
343 /// @param mach_inst The binary instruction to decode.
344 /// @retval A pointer to the corresponding StaticInst object.
345 StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
346 StaticInstPtr decode(X86ISA::PCState &nextPC);
349 } // namespace X86ISA
351 #endif // __ARCH_X86_DECODER_HH__