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31 #ifndef __ARCH_X86_DECODER_HH__
32 #define __ARCH_X86_DECODER_HH__
37 #include "arch/x86/regs/misc.hh"
38 #include "arch/x86/types.hh"
39 #include "base/bitfield.hh"
40 #include "base/misc.hh"
41 #include "base/trace.hh"
42 #include "base/types.hh"
43 #include "cpu/decode_cache.hh"
44 #include "cpu/static_inst.hh"
45 #include "debug/Decoder.hh"
53 //These are defined and documented in decoder_tables.cc
54 static const uint8_t SizeTypeToSize[3][10];
55 typedef const uint8_t ByteTable[256];
56 static ByteTable Prefixes;
58 static ByteTable UsesModRMOneByte;
59 static ByteTable UsesModRMTwoByte;
60 static ByteTable UsesModRMThreeByte0F38;
61 static ByteTable UsesModRMThreeByte0F3A;
63 static ByteTable ImmediateTypeOneByte;
64 static ByteTable ImmediateTypeTwoByte;
65 static ByteTable ImmediateTypeThreeByte0F38;
66 static ByteTable ImmediateTypeThreeByte0F3A;
72 std::vector<MachInst> chunks;
73 std::vector<MachInst> masks;
76 InstBytes() : lastOffset(0)
80 static InstBytes dummy;
82 //The bytes to be predecoded
86 //The pc of the start of fetchChunk
88 //The pc the current instruction started at
90 //The offset into fetchChunk of current processing
92 //The extended machine instruction being generated
103 uint8_t getNextByte()
105 return ((uint8_t *)&fetchChunk)[offset];
108 void getImmediate(int &collected, uint64_t ¤t, int size)
110 //Figure out how many bytes we still need to get for the
112 int toGet = size - collected;
113 //Figure out how many bytes are left in our "buffer"
114 int remaining = sizeof(MachInst) - offset;
115 //Get as much as we need, up to the amount available.
116 toGet = toGet > remaining ? remaining : toGet;
118 //Shift the bytes we want to be all the way to the right
119 uint64_t partialImm = fetchChunk >> (offset * 8);
120 //Mask off what we don't want
121 partialImm &= mask(toGet * 8);
122 //Shift it over to overlay with our displacement.
123 partialImm <<= (immediateCollected * 8);
124 //Put it into our displacement
125 current |= partialImm;
126 //Update how many bytes we've collected.
131 void updateOffsetState()
133 assert(offset <= sizeof(MachInst));
134 if (offset == sizeof(MachInst)) {
135 DPRINTF(Decoder, "At the end of a chunk, idx = %d, chunks = %d.\n",
136 chunkIdx, instBytes->chunks.size());
138 if (chunkIdx == instBytes->chunks.size()) {
142 fetchChunk = instBytes->chunks[chunkIdx];
143 basePC += sizeof(MachInst);
154 void consumeBytes(int numBytes)
160 //State machine state
162 //Whether or not we're out of bytes
164 //Whether we've completed generating an ExtMachInst
166 //The size of the displacement value
167 int displacementSize;
168 //The size of the immediate value
170 //This is how much of any immediate value we've gotten. This is used
171 //for both the actual immediate and the displacement.
172 int immediateCollected;
180 ThreeByte0F38OpcodeState,
181 ThreeByte0F3AOpcodeState,
186 //We should never get to this state. Getting here is an error.
192 //Functions to handle each of the states
193 State doResetState();
194 State doFromCacheState();
195 State doPrefixState(uint8_t);
196 State doOneByteOpcodeState(uint8_t);
197 State doTwoByteOpcodeState(uint8_t);
198 State doThreeByte0F38OpcodeState(uint8_t);
199 State doThreeByte0F3AOpcodeState(uint8_t);
200 State doModRMState(uint8_t);
201 State doSIBState(uint8_t);
202 State doDisplacementState();
203 State doImmediateState();
205 //Process the actual opcode found earlier, using the supplied tables.
206 State processOpcode(ByteTable &immTable, ByteTable &modrmTable,
207 bool addrSizedImm = false);
210 /// Caching for decoded instruction objects.
212 typedef MiscReg CacheKey;
214 typedef DecodeCache::AddrMap<Decoder::InstBytes> DecodePages;
215 DecodePages *decodePages;
216 typedef m5::hash_map<CacheKey, DecodePages *> AddrCacheMap;
217 AddrCacheMap addrCacheMap;
219 DecodeCache::InstMap *instMap;
220 typedef m5::hash_map<CacheKey, DecodeCache::InstMap *> InstCacheMap;
221 static InstCacheMap instCacheMap;
224 Decoder() : basePC(0), origPC(0), offset(0),
225 outOfBytes(true), instDone(false),
228 memset(&emi, 0, sizeof(emi));
230 submode = SixtyFourBitMode;
231 emi.mode.mode = mode;
232 emi.mode.submode = submode;
243 void setM5Reg(HandyM5Reg m5Reg)
245 mode = (X86Mode)(uint64_t)m5Reg.mode;
246 submode = (X86SubMode)(uint64_t)m5Reg.submode;
247 emi.mode.mode = mode;
248 emi.mode.submode = submode;
251 altAddr = m5Reg.altAddr;
252 defAddr = m5Reg.defAddr;
255 AddrCacheMap::iterator amIter = addrCacheMap.find(m5Reg);
256 if (amIter != addrCacheMap.end()) {
257 decodePages = amIter->second;
259 decodePages = new DecodePages;
260 addrCacheMap[m5Reg] = decodePages;
263 InstCacheMap::iterator imIter = instCacheMap.find(m5Reg);
264 if (imIter != instCacheMap.end()) {
265 instMap = imIter->second;
267 instMap = new DecodeCache::InstMap;
268 instCacheMap[m5Reg] = instMap;
272 void takeOverFrom(Decoder *old)
275 submode = old->submode;
276 emi.mode.mode = mode;
277 emi.mode.submode = submode;
280 altAddr = old->altAddr;
281 defAddr = old->defAddr;
292 //Use this to give data to the decoder. This should be used
293 //when there is control flow.
294 void moreBytes(const PCState &pc, Addr fetchPC, MachInst data)
296 DPRINTF(Decoder, "Getting more bytes.\n");
298 offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
315 updateNPC(X86ISA::PCState &nextPC)
317 if (!nextPC.size()) {
318 int size = basePC + offset - origPC;
320 "Calculating the instruction size: "
321 "basePC: %#x offset: %#x origPC: %#x size: %d\n",
322 basePC, offset, origPC, size);
324 nextPC.npc(nextPC.pc() + size);
329 StaticInstPtr decodeInst(ExtMachInst mach_inst);
331 /// Decode a machine instruction.
332 /// @param mach_inst The binary instruction to decode.
333 /// @retval A pointer to the corresponding StaticInst object.
334 StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
335 StaticInstPtr decode(X86ISA::PCState &nextPC);
338 } // namespace X86ISA
340 #endif // __ARCH_X86_DECODER_HH__