X86: Make the fault classes handle error codes better.
[gem5.git] / src / arch / x86 / faults.cc
1 /*
2 * Copyright (c) 2003-2007 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31 /*
32 * Copyright (c) 2007 The Hewlett-Packard Development Company
33 * All rights reserved.
34 *
35 * Redistribution and use of this software in source and binary forms,
36 * with or without modification, are permitted provided that the
37 * following conditions are met:
38 *
39 * The software must be used only for Non-Commercial Use which means any
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55 *
56 * Redistributions of source code must retain the above copyright notice,
57 * this list of conditions and the following disclaimer. Redistributions
58 * in binary form must reproduce the above copyright notice, this list of
59 * conditions and the following disclaimer in the documentation and/or
60 * other materials provided with the distribution. Neither the name of
61 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
62 * contributors may be used to endorse or promote products derived from
63 * this software without specific prior written permission. No right of
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65 * output created using the software may be prepared, but only for
66 * Non-Commercial Uses. Derivatives of the software may be shared with
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70 * notice to acknowledge the contribution from this software where
71 * applicable, this list of conditions and the disclaimer below.
72 *
73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
74 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
75 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
76 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
77 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
78 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
79 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
80 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
81 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
82 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
83 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84 *
85 * Authors: Gabe Black
86 */
87
88 #include "arch/x86/decoder.hh"
89 #include "arch/x86/faults.hh"
90 #include "base/trace.hh"
91 #include "config/full_system.hh"
92 #include "cpu/thread_context.hh"
93 #if !FULL_SYSTEM
94 #include "arch/x86/isa_traits.hh"
95 #include "mem/page_table.hh"
96 #include "sim/process.hh"
97 #else
98 #include "arch/x86/tlb.hh"
99 #endif
100
101 namespace X86ISA
102 {
103 #if FULL_SYSTEM
104 void X86Trap::invoke(ThreadContext * tc)
105 {
106 panic("X86 faults are not implemented!");
107 }
108
109 void X86Abort::invoke(ThreadContext * tc)
110 {
111 panic("X86 faults are not implemented!");
112 }
113
114 void X86Interrupt::invoke(ThreadContext * tc)
115 {
116 using namespace X86ISAInst::RomLabels;
117 HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
118 MicroPC entry;
119 if (m5reg.mode == LongMode) {
120 entry = extern_label_longModeInterrupt;
121 } else {
122 entry = extern_label_legacyModeInterrupt;
123 }
124 tc->setIntReg(INTREG_MICRO(1), vector);
125 tc->setIntReg(INTREG_MICRO(7), tc->readPC());
126 if (errorCode != (uint64_t)(-1)) {
127 tc->setIntReg(INTREG_MICRO(15), errorCode);
128 }
129 tc->setMicroPC(romMicroPC(entry));
130 tc->setNextMicroPC(romMicroPC(entry) + 1);
131 }
132
133 void FakeITLBFault::invoke(ThreadContext * tc)
134 {
135 // Start the page table walker.
136 tc->getITBPtr()->walk(tc, vaddr);
137 }
138
139 void FakeDTLBFault::invoke(ThreadContext * tc)
140 {
141 // Start the page table walker.
142 tc->getDTBPtr()->walk(tc, vaddr);
143 }
144
145 #else // !FULL_SYSTEM
146 void FakeITLBFault::invoke(ThreadContext * tc)
147 {
148 DPRINTF(TLB, "Invoking an ITLB fault for address %#x at pc %#x.\n",
149 vaddr, tc->readPC());
150 Process *p = tc->getProcessPtr();
151 TlbEntry entry;
152 bool success = p->pTable->lookup(vaddr, entry);
153 if(!success) {
154 panic("Tried to execute unmapped address %#x.\n", vaddr);
155 } else {
156 Addr alignedVaddr = p->pTable->pageAlign(vaddr);
157 DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr,
158 entry.pageStart());
159 tc->getITBPtr()->insert(alignedVaddr, entry);
160 }
161 }
162
163 void FakeDTLBFault::invoke(ThreadContext * tc)
164 {
165 DPRINTF(TLB, "Invoking an DTLB fault for address %#x at pc %#x.\n",
166 vaddr, tc->readPC());
167 Process *p = tc->getProcessPtr();
168 TlbEntry entry;
169 bool success = p->pTable->lookup(vaddr, entry);
170 if(!success) {
171 p->checkAndAllocNextPage(vaddr);
172 success = p->pTable->lookup(vaddr, entry);
173 }
174 if(!success) {
175 panic("Tried to access unmapped address %#x.\n", vaddr);
176 } else {
177 Addr alignedVaddr = p->pTable->pageAlign(vaddr);
178 DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr,
179 entry.pageStart());
180 tc->getDTBPtr()->insert(alignedVaddr, entry);
181 }
182 }
183 #endif
184 } // namespace X86ISA
185