src/arch/x86/faults.hh

   1 /*
   2  * Copyright (c) 2007 The Hewlett-Packard Development Company
   3  * All rights reserved.
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions are
  16  * met: redistributions of source code must retain the above copyright
  17  * notice, this list of conditions and the following disclaimer;
  18  * redistributions in binary form must reproduce the above copyright
  19  * notice, this list of conditions and the following disclaimer in the
  20  * documentation and/or other materials provided with the distribution;
  21  * neither the name of the copyright holders nor the names of its
  22  * contributors may be used to endorse or promote products derived from
  23  * this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  *
  37  * Authors: Gabe Black
  38  */
  39
  40 #ifndef __ARCH_X86_FAULTS_HH__
  41 #define __ARCH_X86_FAULTS_HH__
  42
  43 #include <string>
  44
  45 #include "base/bitunion.hh"
  46 #include "base/misc.hh"
  47 #include "sim/faults.hh"
  48 #include "sim/tlb.hh"
  49
  50 namespace X86ISA
  51 {
  52     // Base class for all x86 "faults" where faults is in the m5 sense
  53     class X86FaultBase : public FaultBase
  54     {
  55       protected:
  56         const char * faultName;
  57         const char * mnem;
  58         uint8_t vector;
  59         uint64_t errorCode;
  60
  61         X86FaultBase(const char * _faultName, const char * _mnem,
  62                      const uint8_t _vector, uint64_t _errorCode = (uint64_t)-1)
  63             : faultName(_faultName), mnem(_mnem),
  64               vector(_vector), errorCode(_errorCode)
  65         {
  66         }
  67
  68         const char * name() const
  69         {
  70             return faultName;
  71         }
  72
  73         virtual bool isBenign()
  74         {
  75             return true;
  76         }
  77
  78         virtual const char * mnemonic() const
  79         {
  80             return mnem;
  81         }
  82
  83         virtual bool isSoft()
  84         {
  85             return false;
  86         }
  87
  88         void invoke(ThreadContext * tc,
  89                 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
  90
  91         virtual std::string describe() const;
  92     };
  93
  94     // Base class for x86 faults which behave as if the underlying instruction
  95     // didn't happen.
  96     class X86Fault : public X86FaultBase
  97     {
  98       protected:
  99         X86Fault(const char * name, const char * mnem,
 100                  const uint8_t vector, uint64_t _errorCode = (uint64_t)-1)
 101             : X86FaultBase(name, mnem, vector, _errorCode)
 102         {}
 103     };
 104
 105     // Base class for x86 traps which behave as if the underlying instruction
 106     // completed.
 107     class X86Trap : public X86FaultBase
 108     {
 109       protected:
 110         X86Trap(const char * name, const char * mnem,
 111                 const uint8_t vector, uint64_t _errorCode = (uint64_t)-1)
 112             : X86FaultBase(name, mnem, vector, _errorCode)
 113         {}
 114
 115         void invoke(ThreadContext * tc,
 116                 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 117     };
 118
 119     // Base class for x86 aborts which seem to be catastrophic failures.
 120     class X86Abort : public X86FaultBase
 121     {
 122       protected:
 123         X86Abort(const char * name, const char * mnem,
 124                 const uint8_t vector, uint64_t _errorCode = (uint64_t)-1)
 125             : X86FaultBase(name, mnem, vector, _errorCode)
 126         {}
 127
 128         void invoke(ThreadContext * tc,
 129                 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 130     };
 131
 132     // Base class for x86 interrupts.
 133     class X86Interrupt : public X86FaultBase
 134     {
 135       protected:
 136         X86Interrupt(const char * name, const char * mnem,
 137                 const uint8_t _vector, uint64_t _errorCode = (uint64_t)-1)
 138             : X86FaultBase(name, mnem, _vector, _errorCode)
 139         {}
 140     };
 141
 142     class UnimpInstFault : public FaultBase
 143     {
 144       public:
 145         const char * name() const
 146         {
 147             return "unimplemented_micro";
 148         }
 149
 150         void invoke(ThreadContext * tc,
 151                 StaticInstPtr inst = StaticInst::nullStaticInstPtr)
 152         {
 153             panic("Unimplemented instruction!");
 154         }
 155     };
 156
 157     // Below is a summary of the interrupt/exception information in the
 158     // architecture manuals.
 159
 160     // Class  |  Type    | vector |               Cause                 | mnem
 161     //------------------------------------------------------------------------
 162     //Contrib   Fault     0         Divide-by-Zero-Error                  #DE
 163     //Benign    Either    1         Debug                                 #DB
 164     //Benign    Interrupt 2         Non-Maskable-Interrupt                #NMI
 165     //Benign    Trap      3         Breakpoint                            #BP
 166     //Benign    Trap      4         Overflow                              #OF
 167     //Benign    Fault     5         Bound-Range                           #BR
 168     //Benign    Fault     6         Invalid-Opcode                        #UD
 169     //Benign    Fault     7         Device-Not-Available                  #NM
 170     //Benign    Abort     8         Double-Fault                          #DF
 171     //                    9         Coprocessor-Segment-Overrun
 172     //Contrib   Fault     10        Invalid-TSS                           #TS
 173     //Contrib   Fault     11        Segment-Not-Present                   #NP
 174     //Contrib   Fault     12        Stack                                 #SS
 175     //Contrib   Fault     13        General-Protection                    #GP
 176     //Either    Fault     14        Page-Fault                            #PF
 177     //                    15        Reserved
 178     //Benign    Fault     16        x87 Floating-Point Exception Pending  #MF
 179     //Benign    Fault     17        Alignment-Check                       #AC
 180     //Benign    Abort     18        Machine-Check                         #MC
 181     //Benign    Fault     19        SIMD Floating-Point                   #XF
 182     //                    20-29     Reserved
 183     //Contrib   ?         30        Security Exception                    #SX
 184     //                    31        Reserved
 185     //Benign    Interrupt 0-255     External Interrupts                   #INTR
 186     //Benign    Interrupt 0-255     Software Interrupts                   INTn
 187
 188     class DivideByZero : public X86Fault
 189     {
 190       public:
 191         DivideByZero() :
 192             X86Fault("Divide-by-Zero-Error", "#DE", 0)
 193         {}
 194     };
 195
 196     class DebugException : public X86FaultBase
 197     {
 198       public:
 199         DebugException() :
 200             X86FaultBase("Debug", "#DB", 1)
 201         {}
 202     };
 203
 204     class NonMaskableInterrupt : public X86Interrupt
 205     {
 206       public:
 207         NonMaskableInterrupt(uint8_t _vector) :
 208             X86Interrupt("Non Maskable Interrupt", "#NMI", 2, _vector)
 209         {}
 210     };
 211
 212     class Breakpoint : public X86Trap
 213     {
 214       public:
 215         Breakpoint() :
 216             X86Trap("Breakpoint", "#BP", 3)
 217         {}
 218     };
 219
 220     class OverflowTrap : public X86Trap
 221     {
 222       public:
 223         OverflowTrap() :
 224             X86Trap("Overflow", "#OF", 4)
 225         {}
 226     };
 227
 228     class BoundRange : public X86Fault
 229     {
 230       public:
 231         BoundRange() :
 232             X86Fault("Bound-Range", "#BR", 5)
 233         {}
 234     };
 235
 236     class InvalidOpcode : public X86Fault
 237     {
 238       public:
 239         InvalidOpcode() :
 240             X86Fault("Invalid-Opcode", "#UD", 6)
 241         {}
 242
 243         void invoke(ThreadContext * tc,
 244                 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 245     };
 246
 247     class DeviceNotAvailable : public X86Fault
 248     {
 249       public:
 250         DeviceNotAvailable() :
 251             X86Fault("Device-Not-Available", "#NM", 7)
 252         {}
 253     };
 254
 255     class DoubleFault : public X86Abort
 256     {
 257       public:
 258         DoubleFault() :
 259             X86Abort("Double-Fault", "#DF", 8, 0)
 260         {}
 261     };
 262
 263     class InvalidTSS : public X86Fault
 264     {
 265       public:
 266         InvalidTSS(uint32_t _errorCode) :
 267             X86Fault("Invalid-TSS", "#TS", 10, _errorCode)
 268         {}
 269     };
 270
 271     class SegmentNotPresent : public X86Fault
 272     {
 273       public:
 274         SegmentNotPresent(uint32_t _errorCode) :
 275             X86Fault("Segment-Not-Present", "#NP", 11, _errorCode)
 276         {}
 277     };
 278
 279     class StackFault : public X86Fault
 280     {
 281       public:
 282         StackFault(uint32_t _errorCode) :
 283             X86Fault("Stack", "#SS", 12, _errorCode)
 284         {}
 285     };
 286
 287     class GeneralProtection : public X86Fault
 288     {
 289       public:
 290         GeneralProtection(uint32_t _errorCode) :
 291             X86Fault("General-Protection", "#GP", 13, _errorCode)
 292         {}
 293     };
 294
 295     class PageFault : public X86Fault
 296     {
 297       protected:
 298         BitUnion32(PageFaultErrorCode)
 299             Bitfield<0> present;
 300             Bitfield<1> write;
 301             Bitfield<2> user;
 302             Bitfield<3> reserved;
 303             Bitfield<4> fetch;
 304         EndBitUnion(PageFaultErrorCode)
 305
 306         Addr addr;
 307
 308       public:
 309         PageFault(Addr _addr, uint32_t _errorCode) :
 310             X86Fault("Page-Fault", "#PF", 14, _errorCode), addr(_addr)
 311         {}
 312
 313         PageFault(Addr _addr, bool present, BaseTLB::Mode mode,
 314                 bool user, bool reserved) :
 315             X86Fault("Page-Fault", "#PF", 14, 0), addr(_addr)
 316         {
 317             PageFaultErrorCode code = 0;
 318             code.present = present;
 319             code.write = (mode == BaseTLB::Write);
 320             code.user = user;
 321             code.reserved = reserved;
 322             code.fetch = (mode == BaseTLB::Execute);
 323             errorCode = code;
 324         }
 325
 326         void invoke(ThreadContext * tc,
 327                 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 328
 329         virtual std::string describe() const;
 330     };
 331
 332     class X87FpExceptionPending : public X86Fault
 333     {
 334       public:
 335         X87FpExceptionPending() :
 336             X86Fault("x87 Floating-Point Exception Pending", "#MF", 16)
 337         {}
 338     };
 339
 340     class AlignmentCheck : public X86Fault
 341     {
 342       public:
 343         AlignmentCheck() :
 344             X86Fault("Alignment-Check", "#AC", 17, 0)
 345         {}
 346     };
 347
 348     class MachineCheck : public X86Abort
 349     {
 350       public:
 351         MachineCheck() :
 352             X86Abort("Machine-Check", "#MC", 18)
 353         {}
 354     };
 355
 356     class SIMDFloatingPointFault : public X86Fault
 357     {
 358       public:
 359         SIMDFloatingPointFault() :
 360             X86Fault("SIMD Floating-Point", "#XF", 19)
 361         {}
 362     };
 363
 364     class SecurityException : public X86FaultBase
 365     {
 366       public:
 367         SecurityException() :
 368             X86FaultBase("Security Exception", "#SX", 30)
 369         {}
 370     };
 371
 372     class ExternalInterrupt : public X86Interrupt
 373     {
 374       public:
 375         ExternalInterrupt(uint8_t _vector) :
 376             X86Interrupt("External Interrupt", "#INTR", _vector)
 377         {}
 378     };
 379
 380     class SystemManagementInterrupt : public X86Interrupt
 381     {
 382       public:
 383         SystemManagementInterrupt() :
 384             X86Interrupt("System Management Interrupt", "#SMI", 0)
 385         {}
 386     };
 387
 388     class InitInterrupt : public X86Interrupt
 389     {
 390       public:
 391         InitInterrupt(uint8_t _vector) :
 392             X86Interrupt("INIT Interrupt", "#INIT", _vector)
 393         {}
 394
 395         void invoke(ThreadContext * tc,
 396                 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 397     };
 398
 399     class StartupInterrupt : public X86Interrupt
 400     {
 401       public:
 402         StartupInterrupt(uint8_t _vector) :
 403             X86Interrupt("Startup Interrupt", "#SIPI", _vector)
 404         {}
 405
 406         void invoke(ThreadContext * tc,
 407                 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 408     };
 409
 410     class SoftwareInterrupt : public X86Interrupt
 411     {
 412       public:
 413         SoftwareInterrupt(uint8_t _vector) :
 414             X86Interrupt("Software Interrupt", "#INTR", _vector)
 415         {}
 416
 417         bool isSoft()
 418         {
 419             return true;
 420         }
 421     };
 422 };
 423
 424 #endif // __ARCH_X86_FAULTS_HH__