Automated merge with ssh://m5sim.org//repo/m5
[gem5.git] / src / arch / x86 / floatregs.hh
1 /*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *
9 * The software must be used only for Non-Commercial Use which means any
10 * use which is NOT directed to receiving any direct monetary
11 * compensation for, or commercial advantage from such use. Illustrative
12 * examples of non-commercial use are academic research, personal study,
13 * teaching, education and corporate research & development.
14 * Illustrative examples of commercial use are distributing products for
15 * commercial advantage and providing services using the software for
16 * commercial advantage.
17 *
18 * If you wish to use this software or functionality therein that may be
19 * covered by patents for commercial use, please contact:
20 * Director of Intellectual Property Licensing
21 * Office of Strategy and Technology
22 * Hewlett-Packard Company
23 * 1501 Page Mill Road
24 * Palo Alto, California 94304
25 *
26 * Redistributions of source code must retain the above copyright notice,
27 * this list of conditions and the following disclaimer. Redistributions
28 * in binary form must reproduce the above copyright notice, this list of
29 * conditions and the following disclaimer in the documentation and/or
30 * other materials provided with the distribution. Neither the name of
31 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
32 * contributors may be used to endorse or promote products derived from
33 * this software without specific prior written permission. No right of
34 * sublicense is granted herewith. Derivatives of the software and
35 * output created using the software may be prepared, but only for
36 * Non-Commercial Uses. Derivatives of the software may be shared with
37 * others provided: (i) the others agree to abide by the list of
38 * conditions herein which includes the Non-Commercial Use restrictions;
39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 * Authors: Gabe Black
56 */
57
58 #ifndef __ARCH_X86_FLOATREGS_HH__
59 #define __ARCH_X86_FLOATREGS_HH__
60
61 #include "arch/x86/x86_traits.hh"
62 #include "base/bitunion.hh"
63
64 namespace X86ISA
65 {
66 enum FloatRegIndex
67 {
68 // MMX/X87 registers
69 FLOATREG_MMX_BASE,
70 FLOATREG_FPR_BASE = FLOATREG_MMX_BASE,
71 FLOATREG_MMX0 = FLOATREG_MMX_BASE,
72 FLOATREG_MMX1,
73 FLOATREG_MMX2,
74 FLOATREG_MMX3,
75 FLOATREG_MMX4,
76 FLOATREG_MMX5,
77 FLOATREG_MMX6,
78 FLOATREG_MMX7,
79
80 FLOATREG_FPR0 = FLOATREG_FPR_BASE,
81 FLOATREG_FPR1,
82 FLOATREG_FPR2,
83 FLOATREG_FPR3,
84 FLOATREG_FPR4,
85 FLOATREG_FPR5,
86 FLOATREG_FPR6,
87 FLOATREG_FPR7,
88
89 FLOATREG_XMM_BASE = FLOATREG_MMX_BASE + NumMMXRegs,
90 FLOATREG_XMM0_LOW = FLOATREG_XMM_BASE,
91 FLOATREG_XMM0_HIGH,
92 FLOATREG_XMM1_LOW,
93 FLOATREG_XMM1_HIGH,
94 FLOATREG_XMM2_LOW,
95 FLOATREG_XMM2_HIGH,
96 FLOATREG_XMM3_LOW,
97 FLOATREG_XMM3_HIGH,
98 FLOATREG_XMM4_LOW,
99 FLOATREG_XMM4_HIGH,
100 FLOATREG_XMM5_LOW,
101 FLOATREG_XMM5_HIGH,
102 FLOATREG_XMM6_LOW,
103 FLOATREG_XMM6_HIGH,
104 FLOATREG_XMM7_LOW,
105 FLOATREG_XMM7_HIGH,
106 FLOATREG_XMM8_LOW,
107 FLOATREG_XMM8_HIGH,
108 FLOATREG_XMM9_LOW,
109 FLOATREG_XMM9_HIGH,
110 FLOATREG_XMM10_LOW,
111 FLOATREG_XMM10_HIGH,
112 FLOATREG_XMM11_LOW,
113 FLOATREG_XMM11_HIGH,
114 FLOATREG_XMM12_LOW,
115 FLOATREG_XMM12_HIGH,
116 FLOATREG_XMM13_LOW,
117 FLOATREG_XMM13_HIGH,
118 FLOATREG_XMM14_LOW,
119 FLOATREG_XMM14_HIGH,
120 FLOATREG_XMM15_LOW,
121 FLOATREG_XMM15_HIGH,
122
123 FLOATREG_MICROFP_BASE = FLOATREG_XMM_BASE + 2 * NumXMMRegs,
124 FLOATREG_MICROFP0 = FLOATREG_MICROFP_BASE,
125 FLOATREG_MICROFP1,
126 FLOATREG_MICROFP2,
127 FLOATREG_MICROFP3,
128 FLOATREG_MICROFP4,
129 FLOATREG_MICROFP5,
130 FLOATREG_MICROFP6,
131 FLOATREG_MICROFP7,
132
133 NUM_FLOATREGS = FLOATREG_MICROFP_BASE + NumMicroFpRegs
134 };
135
136 static inline FloatRegIndex
137 FLOATREG_MMX(int index)
138 {
139 return (FloatRegIndex)(FLOATREG_MMX_BASE + index);
140 }
141
142 static inline FloatRegIndex
143 FLOATREG_FPR(int index)
144 {
145 return (FloatRegIndex)(FLOATREG_FPR_BASE + index);
146 }
147
148 static inline FloatRegIndex
149 FLOATREG_XMM_LOW(int index)
150 {
151 return (FloatRegIndex)(FLOATREG_XMM_BASE + 2 * index);
152 }
153
154 static inline FloatRegIndex
155 FLOATREG_XMM_HIGH(int index)
156 {
157 return (FloatRegIndex)(FLOATREG_XMM_BASE + 2 * index + 1);
158 }
159
160 static inline FloatRegIndex
161 FLOATREG_MICROFP(int index)
162 {
163 return (FloatRegIndex)(FLOATREG_MICROFP_BASE + index);
164 }
165
166 static inline FloatRegIndex
167 FLOATREG_STACK(int index, int top)
168 {
169 return FLOATREG_FPR((top + index + 8) % 8);
170 }
171 };
172
173 #endif // __ARCH_X86_FLOATREGS_HH__