Merge with head.
[gem5.git] / src / arch / x86 / intregs.hh
1 /*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *
9 * The software must be used only for Non-Commercial Use which means any
10 * use which is NOT directed to receiving any direct monetary
11 * compensation for, or commercial advantage from such use. Illustrative
12 * examples of non-commercial use are academic research, personal study,
13 * teaching, education and corporate research & development.
14 * Illustrative examples of commercial use are distributing products for
15 * commercial advantage and providing services using the software for
16 * commercial advantage.
17 *
18 * If you wish to use this software or functionality therein that may be
19 * covered by patents for commercial use, please contact:
20 * Director of Intellectual Property Licensing
21 * Office of Strategy and Technology
22 * Hewlett-Packard Company
23 * 1501 Page Mill Road
24 * Palo Alto, California 94304
25 *
26 * Redistributions of source code must retain the above copyright notice,
27 * this list of conditions and the following disclaimer. Redistributions
28 * in binary form must reproduce the above copyright notice, this list of
29 * conditions and the following disclaimer in the documentation and/or
30 * other materials provided with the distribution. Neither the name of
31 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
32 * contributors may be used to endorse or promote products derived from
33 * this software without specific prior written permission. No right of
34 * sublicense is granted herewith. Derivatives of the software and
35 * output created using the software may be prepared, but only for
36 * Non-Commercial Uses. Derivatives of the software may be shared with
37 * others provided: (i) the others agree to abide by the list of
38 * conditions herein which includes the Non-Commercial Use restrictions;
39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 * Authors: Gabe Black
56 */
57
58 #ifndef __ARCH_X86_INTREGS_HH__
59 #define __ARCH_X86_INTREGS_HH__
60
61 #include "arch/x86/x86_traits.hh"
62 #include "base/bitunion.hh"
63 #include "base/misc.hh"
64 #include "sim/core.hh"
65
66 namespace X86ISA
67 {
68 BitUnion64(X86IntReg)
69 Bitfield<63,0> R;
70 SignedBitfield<63,0> SR;
71 Bitfield<31,0> E;
72 SignedBitfield<31,0> SE;
73 Bitfield<15,0> X;
74 SignedBitfield<15,0> SX;
75 Bitfield<15,8> H;
76 SignedBitfield<15,8> SH;
77 Bitfield<7, 0> L;
78 SignedBitfield<7, 0> SL;
79 EndBitUnion(X86IntReg)
80
81 enum IntRegIndex
82 {
83 INTREG_RAX,
84 INTREG_EAX = INTREG_RAX,
85 INTREG_AX = INTREG_RAX,
86 INTREG_AL = INTREG_RAX,
87
88 INTREG_RCX,
89 INTREG_ECX = INTREG_RCX,
90 INTREG_CX = INTREG_RCX,
91 INTREG_CL = INTREG_RCX,
92
93 INTREG_RDX,
94 INTREG_EDX = INTREG_RDX,
95 INTREG_DX = INTREG_RDX,
96 INTREG_DL = INTREG_RDX,
97
98 INTREG_RBX,
99 INTREG_EBX = INTREG_RBX,
100 INTREG_BX = INTREG_RBX,
101 INTREG_BL = INTREG_RBX,
102
103 INTREG_RSP,
104 INTREG_ESP = INTREG_RSP,
105 INTREG_SP = INTREG_RSP,
106 INTREG_SPL = INTREG_RSP,
107 INTREG_AH = INTREG_RSP,
108
109 INTREG_RBP,
110 INTREG_EBP = INTREG_RBP,
111 INTREG_BP = INTREG_RBP,
112 INTREG_BPL = INTREG_RBP,
113 INTREG_CH = INTREG_RBP,
114
115 INTREG_RSI,
116 INTREG_ESI = INTREG_RSI,
117 INTREG_SI = INTREG_RSI,
118 INTREG_SIL = INTREG_RSI,
119 INTREG_DH = INTREG_RSI,
120
121 INTREG_RDI,
122 INTREG_EDI = INTREG_RDI,
123 INTREG_DI = INTREG_RDI,
124 INTREG_DIL = INTREG_RDI,
125 INTREG_BH = INTREG_RDI,
126
127 INTREG_R8,
128 INTREG_R8D = INTREG_R8,
129 INTREG_R8W = INTREG_R8,
130 INTREG_R8B = INTREG_R8,
131
132 INTREG_R9,
133 INTREG_R9D = INTREG_R9,
134 INTREG_R9W = INTREG_R9,
135 INTREG_R9B = INTREG_R9,
136
137 INTREG_R10,
138 INTREG_R10D = INTREG_R10,
139 INTREG_R10W = INTREG_R10,
140 INTREG_R10B = INTREG_R10,
141
142 INTREG_R11,
143 INTREG_R11D = INTREG_R11,
144 INTREG_R11W = INTREG_R11,
145 INTREG_R11B = INTREG_R11,
146
147 INTREG_R12,
148 INTREG_R12D = INTREG_R12,
149 INTREG_R12W = INTREG_R12,
150 INTREG_R12B = INTREG_R12,
151
152 INTREG_R13,
153 INTREG_R13D = INTREG_R13,
154 INTREG_R13W = INTREG_R13,
155 INTREG_R13B = INTREG_R13,
156
157 INTREG_R14,
158 INTREG_R14D = INTREG_R14,
159 INTREG_R14W = INTREG_R14,
160 INTREG_R14B = INTREG_R14,
161
162 INTREG_R15,
163 INTREG_R15D = INTREG_R15,
164 INTREG_R15W = INTREG_R15,
165 INTREG_R15B = INTREG_R15,
166
167 NUM_INTREGS
168 };
169
170 // This needs to be large enough to miss all the other bits of an index.
171 static const IntRegIndex IntFoldBit = (IntRegIndex)(1 << 6);
172
173 inline static IntRegIndex
174 INTREG_MICRO(int index)
175 {
176 return (IntRegIndex)(NUM_INTREGS + index);
177 }
178
179 inline static IntRegIndex
180 INTREG_PSEUDO(int index)
181 {
182 return (IntRegIndex)(NUM_INTREGS + NumMicroIntRegs + index);
183 }
184
185 inline static IntRegIndex
186 INTREG_IMPLICIT(int index)
187 {
188 return (IntRegIndex)(NUM_INTREGS + NumMicroIntRegs +
189 NumPseudoIntRegs + index);
190 }
191
192 inline static IntRegIndex
193 INTREG_FOLDED(int index, int foldBit)
194 {
195 if ((index & 0x1C) == 4 && foldBit)
196 index = (index - 4) | foldBit;
197 return (IntRegIndex)index;
198 }
199 };
200
201 #endif // __ARCH_X86_INTREGS_HH__