src/arch/x86/intregs.hh

   1 /*
   2  * Copyright (c) 2007 The Hewlett-Packard Development Company
   3  * All rights reserved.
   4  *
   5  * Redistribution and use of this software in source and binary forms,
   6  * with or without modification, are permitted provided that the
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   8  *
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  12  * examples of non-commercial use are academic research, personal study,
  13  * teaching, education and corporate research & development.
  14  * Illustrative examples of commercial use are distributing products for
  15  * commercial advantage and providing services using the software for
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  17  *
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  19  * covered by patents for commercial use, please contact:
  20  *     Director of Intellectual Property Licensing
  21  *     Office of Strategy and Technology
  22  *     Hewlett-Packard Company
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  31  * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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  39  * and (ii) such Derivatives of the software include the above copyright
  40  * notice to acknowledge the contribution from this software where
  41  * applicable, this list of conditions and the disclaimer below.
  42  *
  43  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  46  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  47  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  48  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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  53  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54  *
  55  * Authors: Gabe Black
  56  */
  57
  58 #ifndef __ARCH_X86_INTREGS_HH__
  59 #define __ARCH_X86_INTREGS_HH__
  60
  61 #include "arch/x86/x86_traits.hh"
  62 #include "base/bitunion.hh"
  63
  64 namespace X86ISA
  65 {
  66     BitUnion64(X86IntReg)
  67         Bitfield<63,0> R;
  68         SignedBitfield<63,0> SR;
  69         Bitfield<31,0> E;
  70         SignedBitfield<31,0> SE;
  71         Bitfield<15,0> X;
  72         SignedBitfield<15,0> SX;
  73         Bitfield<15,8> H;
  74         SignedBitfield<15,8> SH;
  75         Bitfield<7, 0> L;
  76         SignedBitfield<7, 0> SL;
  77     EndBitUnion(X86IntReg)
  78
  79     enum IntRegIndex
  80     {
  81         INTREG_RAX,
  82         INTREG_EAX = INTREG_RAX,
  83         INTREG_AX = INTREG_RAX,
  84         INTREG_AL = INTREG_RAX,
  85
  86         INTREG_RCX,
  87         INTREG_ECX = INTREG_RCX,
  88         INTREG_CX = INTREG_RCX,
  89         INTREG_CL = INTREG_RCX,
  90
  91         INTREG_RDX,
  92         INTREG_EDX = INTREG_RDX,
  93         INTREG_DX = INTREG_RDX,
  94         INTREG_DL = INTREG_RDX,
  95
  96         INTREG_RBX,
  97         INTREG_EBX = INTREG_RBX,
  98         INTREG_BX = INTREG_RBX,
  99         INTREG_BL = INTREG_RBX,
 100
 101         INTREG_RSP,
 102         INTREG_ESP = INTREG_RSP,
 103         INTREG_SP = INTREG_RSP,
 104         INTREG_SPL = INTREG_RSP,
 105         INTREG_AH = INTREG_RSP,
 106
 107         INTREG_RBP,
 108         INTREG_EBP = INTREG_RBP,
 109         INTREG_BP = INTREG_RBP,
 110         INTREG_BPL = INTREG_RBP,
 111         INTREG_CH = INTREG_RBP,
 112
 113         INTREG_RSI,
 114         INTREG_ESI = INTREG_RSI,
 115         INTREG_SI = INTREG_RSI,
 116         INTREG_SIL = INTREG_RSI,
 117         INTREG_DH = INTREG_RSI,
 118
 119         INTREG_RDI,
 120         INTREG_EDI = INTREG_RDI,
 121         INTREG_DI = INTREG_RDI,
 122         INTREG_DIL = INTREG_RDI,
 123         INTREG_BH = INTREG_RDI,
 124
 125         INTREG_R8,
 126         INTREG_R8D = INTREG_R8,
 127         INTREG_R8W = INTREG_R8,
 128         INTREG_R8B = INTREG_R8,
 129
 130         INTREG_R9,
 131         INTREG_R9D = INTREG_R9,
 132         INTREG_R9W = INTREG_R9,
 133         INTREG_R9B = INTREG_R9,
 134
 135         INTREG_R10,
 136         INTREG_R10D = INTREG_R10,
 137         INTREG_R10W = INTREG_R10,
 138         INTREG_R10B = INTREG_R10,
 139
 140         INTREG_R11,
 141         INTREG_R11D = INTREG_R11,
 142         INTREG_R11W = INTREG_R11,
 143         INTREG_R11B = INTREG_R11,
 144
 145         INTREG_R12,
 146         INTREG_R12D = INTREG_R12,
 147         INTREG_R12W = INTREG_R12,
 148         INTREG_R12B = INTREG_R12,
 149
 150         INTREG_R13,
 151         INTREG_R13D = INTREG_R13,
 152         INTREG_R13W = INTREG_R13,
 153         INTREG_R13B = INTREG_R13,
 154
 155         INTREG_R14,
 156         INTREG_R14D = INTREG_R14,
 157         INTREG_R14W = INTREG_R14,
 158         INTREG_R14B = INTREG_R14,
 159
 160         INTREG_R15,
 161         INTREG_R15D = INTREG_R15,
 162         INTREG_R15W = INTREG_R15,
 163         INTREG_R15B = INTREG_R15,
 164
 165         NUM_INTREGS
 166     };
 167
 168     inline static IntRegIndex
 169     INTREG_MICRO(int index)
 170     {
 171         return (IntRegIndex)(NUM_INTREGS + index);
 172     }
 173
 174     inline static IntRegIndex
 175     INTREG_PSEUDO(int index)
 176     {
 177         return (IntRegIndex)(NUM_INTREGS + NumMicroIntRegs + index);
 178     }
 179
 180     inline static IntRegIndex
 181     INTREG_IMPLICIT(int index)
 182     {
 183         return (IntRegIndex)(NUM_INTREGS + NumMicroIntRegs +
 184                              NumPseudoIntRegs + index);
 185     }
 186
 187     inline static IntRegIndex
 188     INTREG_FOLDED(int index, int foldBit)
 189     {
 190         return (IntRegIndex)(((index & 0x1C) == 4 ? foldBit : 0) | index);
 191     }
 192 };
 193
 194 #endif // __ARCH_X86_INTREGS_HH__