src/arch/x86/isa/base.isa

   1 // Copyright (c) 2007 The Hewlett-Packard Development Company
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  42 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  43 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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  52 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  53 //
  54 // Authors: Gabe Black
  55
  56 ////////////////////////////////////////////////////////////////////
  57 //
  58 // Base class for sparc instructions, and some support functions
  59 //
  60
  61 let {{
  62     # This class will help make dealing with output a little less verbose
  63     class OutputBlocks(object):
  64         def __init__(self, header_output="",
  65                            decoder_output="",
  66                            decode_block="",
  67                            exec_output=""):
  68             self.header_output = header_output
  69             self.decoder_output = decoder_output
  70             self.decode_block = decode_block
  71             self.exec_output = exec_output
  72
  73         def append(self, blocks):
  74             if isinstance(blocks, list) or isinstance(blocks, tuple):
  75                 assert(len(blocks) == 4)
  76                 self.header_output += blocks[0]
  77                 self.decoder_output += blocks[1]
  78                 self.decode_block += blocks[2]
  79                 self.exec_output += blocks[3]
  80             else:
  81                 self.header_output += blocks.header_output
  82                 self.decoder_output += blocks.decoder_output
  83                 self.decode_block += blocks.decode_block
  84                 self.exec_output += blocks.exec_output
  85
  86         def makeList(self):
  87             return (self.header_output,
  88                     self.decoder_output,
  89                     self.decode_block,
  90                     self.exec_output)
  91 }};
  92
  93 output header {{
  94
  95         /**
  96          * Base class for all X86 static instructions.
  97          */
  98         BitUnion64(X86IntReg)
  99             Bitfield<63,0> R;
 100             Bitfield<31,0> E;
 101             Bitfield<15,0> X;
 102             Bitfield<15,8> H;
 103             Bitfield<7, 0> L;
 104         EndBitUnion(X86IntReg)
 105
 106         class X86StaticInst : public StaticInst
 107         {
 108           protected:
 109             // Constructor.
 110             X86StaticInst(const char *mnem,
 111                  ExtMachInst _machInst, OpClass __opClass)
 112                     : StaticInst(mnem, _machInst, __opClass)
 113                 {
 114                 }
 115
 116             std::string generateDisassembly(Addr pc,
 117                 const SymbolTable *symtab) const;
 118
 119             void printReg(std::ostream &os, int reg) const;
 120             void printSrcReg(std::ostream &os, int reg) const;
 121             void printDestReg(std::ostream &os, int reg) const;
 122
 123             inline uint64_t merge(uint64_t into, uint64_t val, int size) const
 124             {
 125                 X86IntReg reg;
 126                 reg = into;
 127                 //FIXME This needs to be handle high bytes as well
 128                 switch(size)
 129                 {
 130                   case 1:
 131                     reg.L = val;
 132                     break;
 133                   case 2:
 134                     reg.X = val;
 135                     break;
 136                   case 4:
 137                     //XXX Check if this should be zeroed or sign extended
 138                     reg = 0;
 139                     reg.E = val;
 140                     break;
 141                   case 8:
 142                     reg.R = val;
 143                     break;
 144                   default:
 145                     panic("Tried to merge with unrecognized size %d.\n", size);
 146                 }
 147                 return val;
 148             }
 149
 150             inline uint64_t pick(uint64_t from, int size)
 151             {
 152                 X86IntReg reg;
 153                 reg = from;
 154                 switch(size)
 155                 {
 156                   case 1:
 157                     return reg.L;
 158                   case 2:
 159                     return reg.E;
 160                   case 4:
 161                     return reg.X;
 162                   case 8:
 163                     return reg.R;
 164                   default:
 165                     panic("Tried to pick with unrecognized size %d.\n", size);
 166                 }
 167             }
 168
 169         };
 170 }};
 171
 172 output decoder {{
 173
 174         inline void printMnemonic(std::ostream &os, const char * mnemonic)
 175         {
 176             ccprintf(os, "\t%s   ", mnemonic);
 177         }
 178
 179         inline void printMnemonic(std::ostream &os,
 180                 const char * instMnemonic, const char * mnemonic)
 181         {
 182             ccprintf(os, "\t%s : %s   ", instMnemonic, mnemonic);
 183         }
 184
 185         void printSegment(std::ostream &os, int segment)
 186         {
 187             switch (segment)
 188             {
 189               case 0:
 190                 ccprintf(os, "ES");
 191                 break;
 192               case 1:
 193                 ccprintf(os, "CS");
 194                 break;
 195               case 2:
 196                 ccprintf(os, "SS");
 197                 break;
 198               case 3:
 199                 ccprintf(os, "DS");
 200                 break;
 201               case 4:
 202                 ccprintf(os, "FS");
 203                 break;
 204               case 5:
 205                 ccprintf(os, "GS");
 206                 break;
 207               default:
 208                 panic("Unrecognized segment %d\n", segment);
 209             }
 210         }
 211
 212         void
 213         X86StaticInst::printSrcReg(std::ostream &os, int reg) const
 214         {
 215             if(_numSrcRegs > reg)
 216                 printReg(os, _srcRegIdx[reg]);
 217         }
 218
 219         void
 220         X86StaticInst::printDestReg(std::ostream &os, int reg) const
 221         {
 222             if(_numDestRegs > reg)
 223                 printReg(os, _destRegIdx[reg]);
 224         }
 225
 226         void
 227         X86StaticInst::printReg(std::ostream &os, int reg) const
 228         {
 229             if (reg < FP_Base_DepTag) {
 230                 //FIXME These should print differently depending on the
 231                 //mode etc, but for now this will get the point across
 232                 switch (reg) {
 233                   case INTREG_RAX:
 234                     ccprintf(os, "rax");
 235                     break;
 236                   case INTREG_RBX:
 237                     ccprintf(os, "rbx");
 238                     break;
 239                   case INTREG_RCX:
 240                     ccprintf(os, "rcx");
 241                     break;
 242                   case INTREG_RDX:
 243                     ccprintf(os, "rdx");
 244                     break;
 245                   case INTREG_RSP:
 246                     ccprintf(os, "rsp");
 247                     break;
 248                   case INTREG_RBP:
 249                     ccprintf(os, "rbp");
 250                     break;
 251                   case INTREG_RSI:
 252                     ccprintf(os, "rsi");
 253                     break;
 254                   case INTREG_RDI:
 255                     ccprintf(os, "rdi");
 256                     break;
 257                   case INTREG_R8W:
 258                     ccprintf(os, "r8");
 259                     break;
 260                   case INTREG_R9W:
 261                     ccprintf(os, "r9");
 262                     break;
 263                   case INTREG_R10W:
 264                     ccprintf(os, "r10");
 265                     break;
 266                   case INTREG_R11W:
 267                     ccprintf(os, "r11");
 268                     break;
 269                   case INTREG_R12W:
 270                     ccprintf(os, "r12");
 271                     break;
 272                   case INTREG_R13W:
 273                     ccprintf(os, "r13");
 274                     break;
 275                   case INTREG_R14W:
 276                     ccprintf(os, "r14");
 277                     break;
 278                   case INTREG_R15W:
 279                     ccprintf(os, "r15");
 280                     break;
 281                   default:
 282                     ccprintf(os, "t%d", reg - NUM_INTREGS);
 283                 }
 284             } else if (reg < Ctrl_Base_DepTag) {
 285                 ccprintf(os, "%%f%d", reg - FP_Base_DepTag);
 286             } else {
 287                 switch (reg - Ctrl_Base_DepTag) {
 288                   default:
 289                     ccprintf(os, "%%ctrl%d", reg - Ctrl_Base_DepTag);
 290                 }
 291             }
 292         }
 293
 294         std::string X86StaticInst::generateDisassembly(Addr pc,
 295             const SymbolTable *symtab) const
 296         {
 297             std::stringstream ss;
 298
 299             printMnemonic(ss, mnemonic);
 300
 301             return ss.str();
 302         }
 303 }};