1 // Copyright (c) 2007-2008 The Hewlett-Packard Development Company
2 // Copyright (c) 2012-2013 AMD
3 // All rights reserved.
5 // The license below extends only to copyright in the software and shall
6 // not be construed as granting a license to any other intellectual
7 // property including but not limited to intellectual property relating
8 // to a hardware implementation of the functionality of the software
9 // licensed hereunder. You may use the software subject to the license
10 // terms below provided that you ensure that this notice is replicated
11 // unmodified and in its entirety in all distributions of the software,
12 // modified or unmodified, in source code or in binary form.
14 // Copyright (c) 2008 The Regents of The University of Michigan
15 // All rights reserved.
17 // Redistribution and use in source and binary forms, with or without
18 // modification, are permitted provided that the following conditions are
19 // met: redistributions of source code must retain the above copyright
20 // notice, this list of conditions and the following disclaimer;
21 // redistributions in binary form must reproduce the above copyright
22 // notice, this list of conditions and the following disclaimer in the
23 // documentation and/or other materials provided with the distribution;
24 // neither the name of the copyright holders nor the names of its
25 // contributors may be used to endorse or promote products derived from
26 // this software without specific prior written permission.
28 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 // Authors: Gabe Black
42 ////////////////////////////////////////////////////////////////////
44 // Decode the two byte opcodes
46 'X86ISA::TwoByteOpcode': decode OPCODE_OP_TOP5 {
48 0x00: decode OPCODE_OP_BOTTOM3 {
50 0x00: decode MODRM_REG {
57 //0x6: jmpe_Ev(); // IA-64
60 //0x01: group7(); // Ugly, ugly, ugly...
61 0x01: decode MODRM_REG {
62 0x0: decode MODRM_MOD {
63 0x3: decode MODRM_RM {
72 0x1: decode MODRM_MOD {
73 0x3: decode MODRM_RM {
74 0x0: MonitorInst::monitor({{
77 0x1: MwaitInst::mwait({{
79 unsigned s = 0x8; //size
80 unsigned f = 0; //flags
81 readMemAtomic(xc, traceData,
82 xc->getAddrMonitor()->vAddr,
84 xc->mwaitAtomic(xc->tcBase());
85 MicroHalt hltObj(machInst, mnemonic, 0x0);
86 hltObj.execute(xc, traceData);
92 0x2: decode MODRM_MOD {
93 0x3: decode MODRM_RM {
97 default: decode MODE_SUBMODE {
99 default: decode OPSIZE {
100 // 16 bit operand sizes are special, but only
101 // in legacy and compatability modes.
102 0x2: Inst::LGDT_16(M);
103 default: Inst::LGDT(M);
107 0x3: decode MODRM_MOD {
108 0x3: decode MODRM_RM {
118 default: decode MODE_SUBMODE {
120 default: decode OPSIZE {
121 // 16 bit operand sizes are special, but only
122 // in legacy and compatability modes.
123 0x2: Inst::LIDT_16(M);
124 default: Inst::LIDT(M);
128 0x4: decode MODRM_MOD {
130 default: Inst::SMSW(Mw);
133 0x7: decode MODRM_MOD {
134 0x3: decode MODRM_RM {
137 default: Inst::UD2();
139 default: Inst::INVLPG(M);
144 // sandpile.org doesn't seem to know what this is...? We'll
145 // use it for pseudo instructions. We've got 16 bits of space
146 // to play with so there can be quite a few pseudo
148 //0x04: loadall_or_reset_or_hang();
149 0x4: decode IMMEDIATE {
150 format BasicOperate {
152 PseudoInst::arm(xc->tcBase());
153 }}, IsNonSpeculative);
155 PseudoInst::quiesce(xc->tcBase());
156 }}, IsNonSpeculative, IsQuiesce);
158 PseudoInst::quiesceNs(xc->tcBase(), Rdi);
159 }}, IsNonSpeculative, IsQuiesce);
160 0x03: m5quiesceCycle({{
161 PseudoInst::quiesceCycles(xc->tcBase(), Rdi);
162 }}, IsNonSpeculative, IsQuiesce);
163 0x04: m5quiesceTime({{
164 Rax = PseudoInst::quiesceTime(xc->tcBase());
165 }}, IsNonSpeculative);
167 Rax = PseudoInst::rpns(xc->tcBase());
168 }}, IsNonSpeculative);
170 PseudoInst::m5exit(xc->tcBase(), Rdi);
171 }}, IsNonSpeculative);
173 PseudoInst::m5fail(xc->tcBase(), Rdi, Rsi);
174 }}, IsNonSpeculative);
176 Rax = PseudoInst::initParam(xc->tcBase(), Rdi, Rsi);
177 }}, IsNonSpeculative);
178 0x31: m5loadsymbol({{
179 PseudoInst::loadsymbol(xc->tcBase());
180 }}, IsNonSpeculative);
181 0x40: m5resetstats({{
182 PseudoInst::resetstats(xc->tcBase(), Rdi, Rsi);
183 }}, IsNonSpeculative);
185 PseudoInst::dumpstats(xc->tcBase(), Rdi, Rsi);
186 }}, IsNonSpeculative);
187 0x42: m5dumpresetstats({{
188 PseudoInst::dumpresetstats(xc->tcBase(), Rdi, Rsi);
189 }}, IsNonSpeculative);
190 0x43: m5checkpoint({{
191 PseudoInst::m5checkpoint(xc->tcBase(), Rdi, Rsi);
192 }}, IsNonSpeculative);
194 Rax = PseudoInst::readfile(
195 xc->tcBase(), Rdi, Rsi, Rdx);
196 }}, IsNonSpeculative);
197 0x51: m5debugbreak({{
198 PseudoInst::debugbreak(xc->tcBase());
199 }}, IsNonSpeculative);
201 PseudoInst::switchcpu(xc->tcBase());
202 }}, IsNonSpeculative);
204 PseudoInst::addsymbol(xc->tcBase(), Rdi, Rsi);
205 }}, IsNonSpeculative);
207 panic("M5 panic instruction called at pc = %#x.\n",
209 }}, IsNonSpeculative);
211 warn("M5 reserved opcode 1 ignored.\n");
212 }}, IsNonSpeculative);
214 warn("M5 reserved opcode 2 ignored.\n");
215 }}, IsNonSpeculative);
217 warn("M5 reserved opcode 3 ignored.\n");
218 }}, IsNonSpeculative);
220 warn("M5 reserved opcode 4 ignored.\n");
221 }}, IsNonSpeculative);
223 warn("M5 reserved opcode 5 ignored.\n");
224 }}, IsNonSpeculative);
225 0x5a: m5_work_begin({{
226 PseudoInst::workbegin(xc->tcBase(), Rdi, Rsi);
227 }}, IsNonSpeculative);
229 PseudoInst::workend(xc->tcBase(), Rdi, Rsi);
230 }}, IsNonSpeculative);
231 0x62: m5togglesync({{
232 PseudoInst::togglesync(xc->tcBase());
233 }}, IsNonSpeculative, IsQuiesce);
234 default: Inst::UD2();
237 0x05: decode FullSystemInt {
238 0: SyscallInst::syscall('xc->syscall(Rax, &fault)',
239 IsSyscall, IsNonSpeculative,
241 default: decode MODE_MODE {
242 0x0: decode MODE_SUBMODE {
243 0x0: Inst::SYSCALL_64();
244 0x1: Inst::SYSCALL_COMPAT();
246 0x1: Inst::SYSCALL_LEGACY();
250 0x07: decode MODE_SUBMODE {
252 // Return to 64 bit mode.
253 0x8: Inst::SYSRET_TO_64();
254 // Return to compatibility mode.
255 default: Inst::SYSRET_TO_COMPAT();
257 default: Inst::SYSRET_NON_64();
260 0x01: decode OPCODE_OP_BOTTOM3 {
266 0x5: Inst::PREFETCH(Mb);
267 0x6: FailUnimpl::femms();
268 0x7: decode IMMEDIATE {
273 0x8A: pfnacc_Pq_Qq();
274 0x8E: pfpnacc_Pq_Qq();
275 0x90: pfcmpge_Pq_Qq();
278 0x97: pfrsqrt_Pq_Qq();
279 0x9A: Inst::PFSUB(Pq,Qq);
281 0xA0: pfcmpgt_Pq_Qq();
283 0xA6: pfrcpit1_Pq_Qq();
284 0xA7: pfrsqit1_Pq_Qq();
285 0xAA: Inst::PFSUBR(Pq,Qq);
287 0xB0: pfcmpeq_Pq_Qq();
288 0xB4: Inst::PFMUL(Pq,Qq);
289 0xB6: pfrcpit2_Pq_Qq();
290 0xB7: Inst::PMULHRW(Pq,Qq);
291 0xBB: pswapd_Pq_Qq();
292 0xBF: pavgusb_Pq_Qq();
293 default: Inst::UD2();
297 0x02: decode LEGACY_DECODEVAL {
299 0x0: decode OPCODE_OP_BOTTOM3 {
302 0x2: decode MODRM_MOD {
303 0x3: MOVHLPS(Vps,VRq);
304 default: MOVLPS(Vps,Mq);
307 0x4: UNPCKLPS(Vps,Wq);
308 0x5: UNPCKHPS(Vps,Wq);
309 0x6: decode MODRM_MOD {
310 0x3: MOVLHPS(Vps,VRq);
311 default: MOVHPS(Vps,Mq);
316 0x4: decode OPCODE_OP_BOTTOM3 {
319 0x2: WarnUnimpl::movsldup_Vo_Wo();
320 0x6: WarnUnimpl::movshdup_Vo_Wo();
323 // operand size (0x66)
324 0x1: decode OPCODE_OP_BOTTOM3 {
329 0x4: UNPCKLPD(Vo,Wq);
330 0x5: UNPCKHPD(Vo,Wo);
335 0x8: decode OPCODE_OP_BOTTOM3 {
343 0x03: decode OPCODE_OP_BOTTOM3 {
345 0x0: decode MODRM_REG {
346 0x0: WarnUnimpl::prefetch_nta();
347 0x1: PREFETCH_T0(Mb);
348 0x2: WarnUnimpl::prefetch_t1();
349 0x3: WarnUnimpl::prefetch_t2();
360 0x04: decode LEGACY_DECODEVAL {
362 0x0: decode OPCODE_OP_BOTTOM3 {
364 {{isValidMiscReg(MISCREG_CR(MODRM_REG))}},Rd,Cd);
367 {{isValidMiscReg(MISCREG_CR(MODRM_REG))}},Cd,Rd);
371 // operand size (0x66)
372 0x1: decode OPCODE_OP_BOTTOM3 {
378 0x05: decode LEGACY_DECODEVAL {
380 0x0: decode OPCODE_OP_BOTTOM3 {
381 //These moves should really use size o (octword), but
382 //because they are split in two, they use q (quadword).
385 0x2: CVTPI2PS(Vq,Qq);
386 0x3: WarnUnimpl::movntps_Mo_Vo();
387 0x4: CVTTPS2PI(Pq,Wq);
388 0x5: CVTPS2PI(Pq,Wq);
393 0x4: decode OPCODE_OP_BOTTOM3 {
394 0x2: CVTSI2SS(Vd,Ed);
395 0x4: CVTTSS2SI(Gd,Wd);
396 0x5: CVTSS2SI(Gd,Wd);
399 // operand size (0x66)
400 0x1: decode OPCODE_OP_BOTTOM3 {
403 0x2: CVTPI2PD(Vo,Qq);
404 0x3: WarnUnimpl::movntpd_Mo_Vo();
405 0x4: CVTTPD2PI(Pq,Wo);
406 0x5: CVTPD2PI(Pq,Wo);
411 0x8: decode OPCODE_OP_BOTTOM3 {
412 // The size of the V operand should be q, not dp
413 0x2: CVTSI2SD(Vdp,Edp);
414 // The size of the W operand should be q, not dp
415 0x4: CVTTSD2SI(Gdp,Wdp);
416 0x5: CVTSD2SI(Gd,Wq);
422 0x06: decode OPCODE_OP_BOTTOM3 {
427 0x4: decode FullSystemInt {
428 0: SyscallInst::sysenter('xc->syscall(Rax, &fault)',
429 IsSyscall, IsNonSpeculative,
437 0x07: decode OPCODE_OP_BOTTOM3 {
438 0x0: M5InternalError::error(
439 {{"Three byte opcode shouldn't be handled by "
440 "two_byte_opcodes.isa!"}});
441 0x2: M5InternalError::error(
442 {{"Three byte opcode shouldn't be handled by "
443 "two_byte_opcodes.isa!"}});
447 0x08: decode OPCODE_OP_BOTTOM3 {
457 0x09: decode OPCODE_OP_BOTTOM3 {
467 0x0A: decode LEGACY_DECODEVAL {
469 0x0: decode OPCODE_OP_BOTTOM3 {
470 0x0: MOVMSKPS(Gd,VRo);
472 0x2: WarnUnimpl::rqsrtps_Vo_Wo();
480 0x4: decode OPCODE_OP_BOTTOM3 {
482 0x2: WarnUnimpl::rsqrtss_Vd_Wd();
486 // operand size (0x66)
487 0x1: decode OPCODE_OP_BOTTOM3 {
488 0x0: MOVMSKPD(Gd,VRo);
497 0x8: decode OPCODE_OP_BOTTOM3 {
503 0x0B: decode LEGACY_DECODEVAL {
505 0x0: decode OPCODE_OP_BOTTOM3 {
508 0x2: CVTPS2PD(Vo,Wq);
509 0x3: CVTDQ2PS(Vo,Wo);
516 0x4: decode OPCODE_OP_BOTTOM3 {
519 0x2: CVTSS2SD(Vq,Wd);
520 0x3: CVTTPS2DQ(Vo,Wo);
526 // operand size (0x66)
527 0x1: decode OPCODE_OP_BOTTOM3 {
530 0x2: CVTPD2PS(Vo,Wo);
531 0x3: CVTPS2DQ(Vo,Wo);
538 0x8: decode OPCODE_OP_BOTTOM3 {
541 0x2: CVTSD2SS(Vd,Wq);
550 0x0C: decode LEGACY_DECODEVAL {
552 0x0: decode OPCODE_OP_BOTTOM3 {
553 0x0: PUNPCKLBW(Pq,Qd);
554 0x1: PUNPCKLWD(Pq,Qd);
555 0x2: PUNPCKLDQ(Pq,Qd);
556 0x3: PACKSSWB(Pq,Qq);
560 0x7: PACKUSWB(Pq,Qq);
562 // operand size (0x66)
563 0x1: decode OPCODE_OP_BOTTOM3 {
564 0x0: PUNPCKLBW(Vo,Wq);
565 0x1: PUNPCKLWD(Vo,Wq);
566 0x2: PUNPCKLDQ(Vo,Wq);
567 0x3: PACKSSWB(Vo,Wo);
571 0x7: PACKUSWB(Vo,Wo);
575 0x0D: decode LEGACY_DECODEVAL {
577 0x0: decode OPCODE_OP_BOTTOM3 {
578 0x0: PUNPCKHBW(Pq,Qq);
579 0x1: PUNPCKHWD(Pq,Qq);
580 0x2: PUNPCKHDQ(Pq,Qq);
581 0x3: PACKSSDW(Pq,Qq);
587 0x4: decode OPCODE_OP_BOTTOM3 {
591 // operand size (0x66)
592 0x1: decode OPCODE_OP_BOTTOM3 {
593 0x0: PUNPCKHBW(Vo,Wo);
594 0x1: PUNPCKHWD(Vo,Wo);
595 0x2: PUNPCKHDQ(Vo,Wo);
596 0x3: PACKSSDW(Vo,Wo);
597 0x4: PUNPCKLQDQ(Vo,Wq);
598 0x5: PUNPCKHQDQ(Vo,Wq);
604 0x0E: decode LEGACY_DECODEVAL {
606 0x0: decode OPCODE_OP_BOTTOM3 {
607 0x0: PSHUFW(Pq,Qq,Ib);
608 //0x1: group12_pshimw();
609 0x1: decode MODRM_REG {
615 //0x2: group13_pshimd();
616 0x2: decode MODRM_REG {
622 //0x3: group14_pshimq();
623 0x3: decode MODRM_REG {
626 default: Inst::UD2();
628 0x4: Inst::PCMPEQB(Pq,Qq);
629 0x5: Inst::PCMPEQW(Pq,Qq);
630 0x6: Inst::PCMPEQD(Pq,Qq);
634 0x4: decode OPCODE_OP_BOTTOM3 {
635 0x0: PSHUFHW(Vo,Wo,Ib);
638 // operand size (0x66)
639 0x1: decode OPCODE_OP_BOTTOM3 {
640 0x0: PSHUFD(Vo,Wo,Ib);
641 //0x1: group12_pshimw();
642 0x1: decode MODRM_REG {
647 //0x2: group13_pshimd();
648 0x2: decode MODRM_REG {
654 //0x3: group14_pshimq();
655 0x3: decode MODRM_REG {
668 0x8: decode OPCODE_OP_BOTTOM3 {
669 0x0: PSHUFLW(Vo,Wo,Ib);
674 0x0F: decode LEGACY_DECODEVAL {
676 0x0: decode OPCODE_OP_BOTTOM3 {
677 0x0: WarnUnimpl::vmread_Edp_Gdp();
678 0x1: WarnUnimpl::vmwrite_Gdp_Edp();
684 0x4: decode OPCODE_OP_BOTTOM3 {
689 // operand size (0x66)
690 0x1: decode OPCODE_OP_BOTTOM3 {
692 0x5: WarnUnimpl::hsubpd_Vo_Wo();
698 0x8: decode OPCODE_OP_BOTTOM3 {
700 0x5: WarnUnimpl::hsubps_Vo_Wo();
705 0x10: decode OPCODE_OP_BOTTOM3 {
715 0x11: decode OPCODE_OP_BOTTOM3 {
725 0x12: decode OPCODE_OP_BOTTOM3 {
735 0x13: decode OPCODE_OP_BOTTOM3 {
746 0x14: decode OPCODE_OP_BOTTOM3 {
749 0x2: CPUIDInst::CPUID({{
751 bool success = doCpuid(xc->tcBase(), bits(Rax, 31, 0),
752 bits(Rcx, 31, 0), result);
765 0x3: Inst::BT(Ev,Gv);
766 0x4: Inst::SHLD(Ev,Gv,Ib);
767 0x5: Inst::SHLD(Ev,Gv);
768 default: Inst::UD2();
770 0x15: decode OPCODE_OP_BOTTOM3 {
774 0x3: Inst::BTS(Ev,Gv);
775 0x4: Inst::SHRD(Ev,Gv,Ib);
776 0x5: Inst::SHRD(Ev,Gv);
778 0x6: decode MODRM_MOD {
779 0x3: decode MODRM_REG {
780 0x5: BasicOperate::LFENCE(
781 {{/*Nothing*/}}, IsReadBarrier);
782 0x6: BasicOperate::MFENCE(
783 {{/*Nothing*/}}, IsMemBarrier);
784 0x7: BasicOperate::SFENCE(
785 {{/*Nothing*/}}, IsWriteBarrier);
786 default: Inst::UD2();
788 default: decode MODRM_REG {
791 8: Inst::FXSAVE64(M);
796 8: Inst::FXRSTOR64(M);
799 0x2: Inst::LDMXCSR(Md);
800 0x3: Inst::STMXCSR(Md);
807 0x7: Inst::IMUL(Gv,Ev);
810 0x16: decode OPCODE_OP_BOTTOM3 {
813 0x2: WarnUnimpl::lss_Gz_Mp();
815 0x4: WarnUnimpl::lfs_Gz_Mp();
816 0x5: WarnUnimpl::lgs_Gz_Mp();
817 //The size of the second operand in these instructions
818 //should really be "b" or "w", but it's set to v in order
819 //to have a consistent register size. This shouldn't
824 0x17: decode OPCODE_OP_BOTTOM3 {
825 0x0: decode LEGACY_REP {
826 0x0: WarnUnimpl::jmpe_Jz();
827 0x1: WarnUnimpl::popcnt_Gv_Ev();
829 //0x1: group10_UD2();
831 //0x2: group8_Ev_Ib();
832 0x2: decode MODRM_REG {
842 //The size of the second operand in these instructions
843 //should really be "b" or "w", but it's set to v in order
844 //to have a consistent register size. This shouldn't
849 0x18: decode OPCODE_OP_BOTTOM3 {
853 0x7: decode MODRM_REG {
856 0x6: decode LEGACY_OP {
857 0x1: WarnUnimpl::vmclear_Mq();
858 default: decode LEGACY_REP {
859 0x1: WarnUnimpl::vmxon_Mq();
860 0x0: WarnUnimpl::vmptrld_Mq();
863 0x7: WarnUnimpl::vmptrst_Mq();
866 default: decode LEGACY_DECODEVAL {
868 0x0: decode OPCODE_OP_BOTTOM3 {
869 0x2: CMPPS(Vo,Wo,Ib);
870 0x3: MOVNTI(Mdp,Gdp);
871 0x4: PINSRW(Pq,Ew,Ib);
872 0x5: PEXTRW(Gd,PRq,Ib);
873 0x6: SHUFPS(Vps,Wps,Ib);
876 0x4: decode OPCODE_OP_BOTTOM3 {
877 0x2: CMPSS(Vd,Wd,Ib);
880 // operand size (0x66)
881 0x1: decode OPCODE_OP_BOTTOM3 {
882 0x2: CMPPD(Vo,Wo,Ib);
883 0x4: PINSRW(Vdw,Ew,Ib);
884 0x5: PEXTRW(Gd,VRdq,Ib);
885 0x6: SHUFPD(Vpd,Wpd,Ib);
889 0x8: decode OPCODE_OP_BOTTOM3 {
890 0x2: CMPSD(Vq,Wq,Ib);
896 0x19: decode OPSIZE {
901 0x1A: decode LEGACY_DECODEVAL {
903 0x0: decode OPCODE_OP_BOTTOM3 {
909 0x7: PMOVMSKB(Gd,PRq);
913 0x4: decode OPCODE_OP_BOTTOM3 {
914 0x6: MOVQ2DQ(Vo,PRq);
917 // operand size (0x66)
918 0x1: decode OPCODE_OP_BOTTOM3 {
919 0x0: ADDSUBPD(Vo,Wo);
926 0x7: PMOVMSKB(Gd,VRo);
929 0x8: decode OPCODE_OP_BOTTOM3 {
930 0x0: WarnUnimpl::addsubps_Vo_Wo();
931 0x6: MOVDQ2Q(Pq,VRq);
936 0x1B: decode LEGACY_DECODEVAL {
938 0x0: decode OPCODE_OP_BOTTOM3 {
948 // operand size (0x66)
949 0x1: decode OPCODE_OP_BOTTOM3 {
961 0x1C: decode LEGACY_DECODEVAL {
963 0x0: decode OPCODE_OP_BOTTOM3 {
970 0x7: WarnUnimpl::movntq_Mq_Pq();
974 0x4: decode OPCODE_OP_BOTTOM3 {
975 0x6: CVTDQ2PD(Vo,Wq);
978 // operand size (0x66)
979 0x1: decode OPCODE_OP_BOTTOM3 {
986 0x6: CVTTPD2DQ(Vo,Wo);
987 0x7: WarnUnimpl::movntdq_Mo_Vo();
990 0x8: decode OPCODE_OP_BOTTOM3 {
991 0x6: CVTPD2DQ(Vo,Wo);
996 0x1D: decode LEGACY_DECODEVAL {
998 0x0: decode OPCODE_OP_BOTTOM3 {
1008 // operand size (0x66)
1009 0x1: decode OPCODE_OP_BOTTOM3 {
1021 0x1E: decode LEGACY_DECODEVAL {
1023 0x0: decode OPCODE_OP_BOTTOM3 {
1027 0x4: PMULUDQ(Pq,Qq);
1028 0x5: PMADDWD(Pq,Qq);
1030 0x7: MASKMOVQ(Pq,PRq);
1033 // operand size (0x66)
1034 0x1: decode OPCODE_OP_BOTTOM3 {
1038 0x4: PMULUDQ(Vo,Wo);
1039 0x5: PMADDWD(Vo,Wo);
1041 0x7: MASKMOVDQU(Vo,VRo);
1045 0x8: decode OPCODE_OP_BOTTOM3 {
1046 0x0: WarnUnimpl::lddqu_Vo_Mo();
1051 0x1F: decode LEGACY_DECODEVAL {
1053 0x0: decode OPCODE_OP_BOTTOM3 {
1063 // operand size (0x66)
1064 0x1: decode OPCODE_OP_BOTTOM3 {
1077 default: FailUnimpl::twoByteOps();