1 // Copyright (c) 2008 The Regents of The University of Michigan
2 // All rights reserved.
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are
6 // met: redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer;
8 // redistributions in binary form must reproduce the above copyright
9 // notice, this list of conditions and the following disclaimer in the
10 // documentation and/or other materials provided with the distribution;
11 // neither the name of the copyright holders nor the names of its
12 // contributors may be used to endorse or promote products derived from
13 // this software without specific prior written permission.
15 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 // Authors: Gabe Black
29 // Copyright (c) 2007-2008 The Hewlett-Packard Development Company
30 // All rights reserved.
32 // Redistribution and use of this software in source and binary forms,
33 // with or without modification, are permitted provided that the
34 // following conditions are met:
36 // The software must be used only for Non-Commercial Use which means any
37 // use which is NOT directed to receiving any direct monetary
38 // compensation for, or commercial advantage from such use. Illustrative
39 // examples of non-commercial use are academic research, personal study,
40 // teaching, education and corporate research & development.
41 // Illustrative examples of commercial use are distributing products for
42 // commercial advantage and providing services using the software for
43 // commercial advantage.
45 // If you wish to use this software or functionality therein that may be
46 // covered by patents for commercial use, please contact:
47 // Director of Intellectual Property Licensing
48 // Office of Strategy and Technology
49 // Hewlett-Packard Company
50 // 1501 Page Mill Road
51 // Palo Alto, California 94304
53 // Redistributions of source code must retain the above copyright notice,
54 // this list of conditions and the following disclaimer. Redistributions
55 // in binary form must reproduce the above copyright notice, this list of
56 // conditions and the following disclaimer in the documentation and/or
57 // other materials provided with the distribution. Neither the name of
58 // the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
59 // contributors may be used to endorse or promote products derived from
60 // this software without specific prior written permission. No right of
61 // sublicense is granted herewith. Derivatives of the software and
62 // output created using the software may be prepared, but only for
63 // Non-Commercial Uses. Derivatives of the software may be shared with
64 // others provided: (i) the others agree to abide by the list of
65 // conditions herein which includes the Non-Commercial Use restrictions;
66 // and (ii) such Derivatives of the software include the above copyright
67 // notice to acknowledge the contribution from this software where
68 // applicable, this list of conditions and the disclaimer below.
70 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
71 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
72 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
73 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
74 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
75 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
76 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
77 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
78 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
79 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
80 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
82 // Authors: Gabe Black
84 ////////////////////////////////////////////////////////////////////
86 // Decode the two byte opcodes
88 0x2: decode OPCODE_PREFIXA {
89 0x0F: decode OPCODE_OP_TOP5 {
91 0x00: decode OPCODE_OP_BOTTOM3 {
93 0x00: decode MODRM_REG {
100 //0x6: jmpe_Ev(); // IA-64
101 default: Inst::UD2();
103 //0x01: group7(); // Ugly, ugly, ugly...
104 0x01: decode MODRM_MOD {
105 0x3: decode MODRM_REG {
106 0x0: decode MODRM_RM {
111 default: Inst::UD2();
113 0x1: decode MODRM_RM {
116 default: Inst::UD2();
118 0x3: decode MODRM_RM {
130 0x7: decode MODRM_RM {
133 default: Inst::UD2();
135 default: Inst::UD2();
137 default: decode MODRM_REG {
140 0x2: decode MODE_SUBMODE {
142 default: decode OPSIZE {
143 // 16 bit operand sizes are special, but only
144 // in legacy and compatability modes.
145 0x2: Inst::LGDT_16(M);
146 default: Inst::LGDT(M);
149 0x3: decode MODE_SUBMODE {
151 default: decode OPSIZE {
152 // 16 bit operand sizes are special, but only
153 // in legacy and compatability modes.
154 0x2: Inst::LIDT_16(M);
155 default: Inst::LIDT(M);
160 0x7: Inst::INVLPG(M);
161 default: Inst::UD2();
166 // sandpile.org doesn't seem to know what this is...? We'll
167 // use it for pseudo instructions. We've got 16 bits of space
168 // to play with so there can be quite a few pseudo
170 //0x04: loadall_or_reset_or_hang();
171 0x4: decode IMMEDIATE {
172 format BasicOperate {
175 PseudoInst::arm(xc->tcBase());
176 }}, IsNonSpeculative);
178 PseudoInst::quiesce(xc->tcBase());
179 }}, IsNonSpeculative);
181 PseudoInst::quiesceNs(xc->tcBase(), Rdi);
182 }}, IsNonSpeculative);
183 0x03: m5quiesceCycle({{
184 PseudoInst::quiesceCycles(xc->tcBase(), Rdi);
185 }}, IsNonSpeculative);
186 0x04: m5quiesceTime({{
187 Rax = PseudoInst::quiesceTime(xc->tcBase());
188 }}, IsNonSpeculative);
191 Rax = PseudoInst::rpns(xc->tcBase());
192 }}, IsNonSpeculative);
194 PseudoInst::m5exit(xc->tcBase(), Rdi);
195 }}, IsNonSpeculative);
198 Rax = xc->tcBase()->getCpuPtr()->
200 }}, IsNonSpeculative);
201 0x31: m5loadsymbol({{
202 PseudoInst::loadsymbol(xc->tcBase());
203 }}, IsNonSpeculative);
205 0x40: m5resetstats({{
206 PseudoInst::resetstats(xc->tcBase(), Rdi, Rsi);
207 }}, IsNonSpeculative);
209 PseudoInst::dumpstats(xc->tcBase(), Rdi, Rsi);
210 }}, IsNonSpeculative);
211 0x42: m5dumpresetstats({{
212 PseudoInst::dumpresetstats(xc->tcBase(), Rdi, Rsi);
213 }}, IsNonSpeculative);
214 0x43: m5checkpoint({{
215 PseudoInst::m5checkpoint(xc->tcBase(), Rdi, Rsi);
216 }}, IsNonSpeculative);
219 Rax = PseudoInst::readfile(
220 xc->tcBase(), Rdi, Rsi, Rdx);
221 }}, IsNonSpeculative);
223 0x51: m5debugbreak({{
224 PseudoInst::debugbreak(xc->tcBase());
225 }}, IsNonSpeculative);
227 PseudoInst::switchcpu(xc->tcBase());
228 }}, IsNonSpeculative);
231 PseudoInst::addsymbol(xc->tcBase(), Rdi, Rsi);
232 }}, IsNonSpeculative);
235 panic("M5 panic instruction called at pc=%#x.\n",
237 }}, IsNonSpeculative);
239 warn("M5 reserved opcode 1 ignored.\n");
240 }}, IsNonSpeculative);
242 warn("M5 reserved opcode 2 ignored.\n");
243 }}, IsNonSpeculative);
245 warn("M5 reserved opcode 3 ignored.\n");
246 }}, IsNonSpeculative);
248 warn("M5 reserved opcode 4 ignored.\n");
249 }}, IsNonSpeculative);
251 warn("M5 reserved opcode 5 ignored.\n");
252 }}, IsNonSpeculative);
253 default: Inst::UD2();
259 0x05: SyscallInst::syscall('xc->syscall(Rax)', IsSyscall);
262 //sandpile.org says (AMD) after sysret, so I might want to check
263 //if that means amd64 or AMD machines
264 0x07: loadall_or_sysret();
266 0x01: decode OPCODE_OP_BOTTOM3 {
273 0x6: FailUnimpl::femms();
274 0x7: FailUnimpl::threednow();
276 0x02: decode LEGACY_DECODEVAL {
278 0x0: decode OPCODE_OP_BOTTOM3 {
281 0x2: decode MODRM_MOD {
282 0x3: movhlps_Vq_VRq();
283 default: movlps_Vq_Mq();
288 0x6: decode MODRM_MOD {
289 0x3: movlhps_Vq_VRq();
290 default: movhps_Vq_Mq();
295 0x4: decode OPCODE_OP_BOTTOM3 {
298 0x2: movsldup_Vo_Wo();
299 0x6: movshdup_Vo_Wo();
300 default: Inst::UD2();
302 // operand size (0x66)
303 0x1: decode OPCODE_OP_BOTTOM3 {
306 0x2: Inst::MOVLPD(Vq,Mq);
307 0x3: Inst::MOVLPD(Mq,Vq);
308 0x4: unpcklpd_Vo_Wq();
309 0x5: unpckhpd_Vo_Wo();
314 0x8: decode OPCODE_OP_BOTTOM3 {
315 0x0: Inst::MOVSD(Vq,Wq);
316 0x1: Inst::MOVSD(Wq,Vq);
317 0x2: movddup_Vo_Wq();
318 default: Inst::UD2();
320 default: Inst::UD2();
322 0x03: decode OPCODE_OP_BOTTOM3 {
324 0x0: decode MODRM_REG {
329 default: Inst::HINT_NOP();
331 0x1: Inst::HINT_NOP();
332 0x2: Inst::HINT_NOP();
333 0x3: Inst::HINT_NOP();
334 0x4: Inst::HINT_NOP();
335 0x5: Inst::HINT_NOP();
336 0x6: Inst::HINT_NOP();
337 0x7: Inst::HINT_NOP();
339 0x04: decode LEGACY_DECODEVAL {
341 0x0: decode OPCODE_OP_BOTTOM3 {
342 0x0: Inst::MOV(Rd,Cd);
344 0x2: Inst::MOV(Cd,Rd);
348 default: Inst::UD2();
350 // lock prefix (0xF0)
351 0x2: decode OPCODE_OP_BOTTOM3 {
355 default: Inst::UD2();
357 0x05: decode LEGACY_DECODEVAL {
359 0x0: decode OPCODE_OP_BOTTOM3 {
360 //These moves should really use size o (octword), but
361 //because they are split in two, they use q (quadword).
362 0x0: Inst::MOVAPS(Vq,Wq);
363 0x1: Inst::MOVAPS(Wq,Vq);
364 0x2: decode MODRM_MOD {
365 0x3: cvtpi2pS_Vq_Pq();
366 default: cvtpi2ps_Vq_Mq();
368 0x3: movntps_Mo_Vo();
369 0x4: cvttps2pi_Pq_Wq();
370 0x5: cvtpS2pi_Pq_Wq();
371 0x6: ucomiss_Vd_Wd();
375 0x4: decode OPCODE_OP_BOTTOM3 {
376 0x2: cvtsi2ss_Vd_Ed();
377 0x4: cvttss2si_Gd_Wd();
378 0x5: cvtss2si_Gd_Wd();
379 default: Inst::UD2();
381 // operand size (0x66)
382 0x1: decode OPCODE_OP_BOTTOM3 {
385 0x2: decode MODRM_MOD {
386 0x3: cvtpi2pd_Vo_Pq();
387 default: cvtpi2pd_Vo_Mq();
389 0x3: movntpd_Mo_Vo();
390 0x4: cvttpd2pi_Pq_Wo();
391 0x5: cvtpd2pi_Pq_Wo();
392 0x6: Inst::UCOMISD(Vq,Wq);
396 0x8: decode OPCODE_OP_BOTTOM3 {
397 // The size of the V operand should be q, not dp
398 0x2: Inst::CVTSI2SD(Vdp,Edp);
399 // The size of the W operand should be q, not dp
400 0x4: Inst::CVTTSD2SI(Gdp,Wdp);
401 0x5: cvtsd2si_Gd_Wq();
402 default: Inst::UD2();
404 default: Inst::UD2();
406 0x06: decode OPCODE_OP_BOTTOM3 {
416 0x07: decode OPCODE_OP_BOTTOM3 {
417 0x0: three_byte_opcode();
418 0x1: three_byte_opcode();
419 0x2: three_byte_opcode();
420 0x3: three_byte_opcode();
421 0x4: three_byte_opcode();
422 0x5: three_byte_opcode();
423 0x6: three_byte_opcode();
424 0x7: three_byte_opcode();
427 0x08: decode OPCODE_OP_BOTTOM3 {
437 0x09: decode OPCODE_OP_BOTTOM3 {
448 0x0A: decode LEGACY_DECODEVAL {
450 0x0: decode OPCODE_OP_BOTTOM3 {
451 0x0: movmskps_Gd_VRo();
453 0x2: rqsrtps_Vo_Wo();
461 0x4: decode OPCODE_OP_BOTTOM3 {
463 0x2: rsqrtss_Vd_Wd();
465 default: Inst::UD2();
467 // operand size (0x66)
468 0x1: decode OPCODE_OP_BOTTOM3 {
469 0x0: movmskpd_Gd_VRo();
474 //This really should be type o, but it works on q sized
476 0x7: Inst::XORPD(Vq,Wq);
477 default: Inst::UD2();
481 0x8: decode OPCODE_OP_BOTTOM3 {
488 0x0B: decode LEGACY_DECODEVAL {
490 0x0: decode OPCODE_OP_BOTTOM3 {
493 0x2: cvtps2pd_Vo_Wq();
494 0x3: cvtdq2ps_Vo_Wo();
501 0x4: decode OPCODE_OP_BOTTOM3 {
504 0x2: cvtss2sd_Vq_Wd();
505 0x3: cvttps2dq_Vo_Wo();
511 // operand size (0x66)
512 0x1: decode OPCODE_OP_BOTTOM3 {
515 0x2: cvtpd2ps_Vo_Wo();
516 0x3: cvtps2dq_Vo_Wo();
523 0x8: decode OPCODE_OP_BOTTOM3 {
524 0x0: Inst::ADDSD(Vq,Wq);
525 0x1: Inst::MULSD(Vq,Wq);
526 0x2: cvtsd2ss_Vd_Wq();
527 0x4: Inst::SUBSD(Vq,Wq);
529 0x6: Inst::DIVSD(Vq,Wq);
531 default: Inst::UD2();
533 default: Inst::UD2();
535 0x0C: decode LEGACY_DECODEVAL {
537 0x0: decode OPCODE_OP_BOTTOM3 {
538 0x0: punpcklbw_Pq_Qd();
539 0x1: punpcklwd_Pq_Qd();
540 0x2: punpckldq_Pq_Qd();
541 0x3: packsswb_Pq_Qq();
542 0x4: pcmpgtb_Pq_Qq();
543 0x5: pcmpgtw_Pq_Qq();
544 0x6: pcmpgtd_Pq_Qq();
545 0x7: packuswb_Pq_Qq();
547 // operand size (0x66)
548 0x1: decode OPCODE_OP_BOTTOM3 {
549 0x0: punpcklbw_Vo_Wq();
550 0x1: punpcklwd_Vo_Wq();
551 0x2: punpckldq_Vo_Wq();
552 0x3: packsswb_Vo_Wo();
553 0x4: pcmpgtb_Vo_Wo();
554 0x5: pcmpgtw_Vo_Wo();
555 0x6: pcmpgtd_Vo_Wo();
556 0x7: packuswb_Vo_Wo();
558 default: Inst::UD2();
560 0x0D: decode LEGACY_DECODEVAL {
562 0x0: decode OPCODE_OP_BOTTOM3 {
563 0x0: punpckhbw_Pq_Qq();
564 0x1: punpckhwd_Pq_Qq();
565 0x2: punpckhdq_Pq_Qq();
566 0x3: packssdw_Pq_Qq();
569 default: Inst::UD2();
572 0x4: decode OPCODE_OP_BOTTOM3 {
574 default: Inst::UD2();
576 // operand size (0x66)
577 0x1: decode OPCODE_OP_BOTTOM3 {
578 0x0: punpckhbw_Vo_Wo();
579 0x1: punpckhwd_Vo_Wo();
580 0x2: punpckhdq_Vo_Wo();
581 0x3: packssdw_Vo_Wo();
582 0x4: punpcklqdq_Vo_Wq();
583 0x5: punpcklqdq_Vo_Wq();
587 default: Inst::UD2();
589 0x0E: decode LEGACY_DECODEVAL {
591 0x0: decode OPCODE_OP_BOTTOM3 {
592 0x0: pshufw_Pq_Qq_Ib();
593 //0x1: group13_pshimw();
594 0x1: decode MODRM_REG {
595 0x2: decode LEGACY_OP {
599 0x4: decode LEGACY_OP {
603 0x6: decode LEGACY_OP {
607 default: Inst::UD2();
609 //0x2: group14_pshimd();
610 0x2: decode MODRM_REG {
611 0x2: decode LEGACY_OP {
615 0x4: decode LEGACY_OP {
619 0x6: decode LEGACY_OP {
623 default: Inst::UD2();
625 //0x3: group15_pshimq();
626 0x3: decode MODRM_REG {
627 0x2: decode LEGACY_OP {
631 0x3: decode LEGACY_OP {
633 0x1: psrldq_VRo_Ib();
635 0x6: decode LEGACY_OP {
639 0x7: decode LEGACY_OP {
641 0x1: pslldq_VRo_Ib();
643 default: Inst::UD2();
645 0x4: pcmpeqb_Pq_Qq();
646 0x5: pcmpeqw_Pq_Qq();
647 0x6: pcmpeqd_Pq_Qq();
651 0x4: decode OPCODE_OP_BOTTOM3 {
652 0x0: pshufhw_Vo_Wo_Ib();
653 default: Inst::UD2();
655 // operand size (0x66)
656 0x1: decode OPCODE_OP_BOTTOM3 {
657 0x0: pshufd_Vo_Wo_Ib();
658 //0x1: group13_pshimw();
659 0x1: decode MODRM_REG {
660 0x2: decode LEGACY_OP {
664 0x4: decode LEGACY_OP {
668 0x6: decode LEGACY_OP {
672 default: Inst::UD2();
674 //0x2: group14_pshimd();
675 0x2: decode MODRM_REG {
676 0x2: decode LEGACY_OP {
680 0x4: decode LEGACY_OP {
684 0x6: decode LEGACY_OP {
688 default: Inst::UD2();
690 //0x3: group15_pshimq();
691 0x3: decode MODRM_REG {
692 0x2: decode LEGACY_OP {
696 0x3: decode LEGACY_OP {
698 0x1: psrldq_VRo_Ib();
700 0x6: decode LEGACY_OP {
704 0x7: decode LEGACY_OP {
706 0x1: pslldq_VRo_Ib();
708 default: Inst::UD2();
710 0x4: pcmpeqb_Vo_Wo();
711 0x5: pcmpeqw_Vo_Wo();
712 0x6: pcmpeqd_Vo_Wo();
713 default: Inst::UD2();
716 0x8: decode OPCODE_OP_BOTTOM3 {
717 0x0: pshuflw_Vo_Wo_Ib();
718 default: Inst::UD2();
720 default: Inst::UD2();
722 0x0F: decode LEGACY_DECODEVAL {
724 0x0: decode OPCODE_OP_BOTTOM3 {
725 0x0: vmread_Ed_or_Eq_Gd_or_Gq();
726 0x1: vmwrite_Gd_or_Gq_Ed_or_Eq();
729 default: Inst::UD2();
732 0x4: decode OPCODE_OP_BOTTOM3 {
733 0x6: movq_Vo_Mq_or_Vq_Vq();
735 default: Inst::UD2();
737 // operand size (0x66)
738 0x1: decode OPCODE_OP_BOTTOM3 {
743 default: Inst::UD2();
746 0x8: decode OPCODE_OP_BOTTOM3 {
749 default: Inst::UD2();
751 default: Inst::UD2();
754 0x10: decode OPCODE_OP_BOTTOM3 {
764 0x11: decode OPCODE_OP_BOTTOM3 {
774 0x12: decode OPCODE_OP_BOTTOM3 {
784 0x13: decode OPCODE_OP_BOTTOM3 {
795 0x14: decode OPCODE_OP_BOTTOM3 {
798 0x2: CPUIDInst::CPUID({{
800 success = doCpuid(xc->tcBase(), Rax, result);
806 0x3: Inst::BT(Ev,Gv);
807 0x4: shld_Ev_Gv_Ib();
808 0x5: shld_Ev_Gv_rCl();
809 0x6: xbts_and_cmpxchg();
810 0x7: ibts_and_cmpxchg();
812 0x15: decode OPCODE_OP_BOTTOM3 {
816 0x3: Inst::BTS(Ev,Gv);
817 0x4: shrd_Ev_Gv_Ib();
818 0x5: shrd_Ev_Gv_rCl();
820 0x6: decode MODRM_MOD {
821 0x3: decode MODRM_REG {
825 default: Inst::UD2();
827 default: decode MODRM_REG {
831 default: Inst::UD2();
834 0x7: Inst::IMUL(Gv,Ev);
836 0x16: decode OPCODE_OP_BOTTOM3 {
837 0x0: Inst::CMPXCHG(Eb,Gb);
838 0x1: Inst::CMPXCHG(Ev,Gv);
840 0x3: Inst::BTR(Ev,Gv);
843 //The size of the second operand in these instructions should
844 //really be "b" or "w", but it's set to v in order to have a
845 //consistent register size. This shouldn't affect behavior.
846 0x6: Inst::MOVZX_B(Gv,Ev);
847 0x7: Inst::MOVZX_W(Gv,Ev);
849 0x17: decode OPCODE_OP_BOTTOM3 {
850 0x0: jmpe_Jz(); // IA-64?
852 //0x1: group11_UD2();
854 //0x2: group8_Ev_Ib();
855 0x2: decode MODRM_REG {
864 0x4: Inst::BSF(Gv,Ev);
865 0x5: Inst::BSR(Gv,Ev);
866 //The size of the second operand in these instructions should
867 //really be "b" or "w", but it's set to v in order to have a
868 //consistent register size. This shouldn't affect behavior.
869 0x6: Inst::MOVSX_B(Gv,Ev);
870 0x7: Inst::MOVSX_W(Gv,Ev);
872 0x18: decode OPCODE_OP_BOTTOM3 {
876 0x7: decode MODRM_REG {
878 0x6: decode LEGACY_OP {
880 default: decode LEGACY_REP {
886 default: Inst::UD2();
888 default: decode LEGACY_DECODEVAL {
890 0x0: decode OPCODE_OP_BOTTOM3 {
891 0x2: cmpccps_Vo_Wo_Ib();
892 0x3: cvtdq2ps_Vo_Wo();
898 0x4: decode OPCODE_OP_BOTTOM3 {
899 0x2: cmpccss_Vd_Wd_Ib();
900 default: Inst::UD2();
902 // operand size (0x66)
903 0x1: decode OPCODE_OP_BOTTOM3 {
904 0x2: cmpccpd_Vo_Wo_Ib();
908 default: Inst::UD2();
911 0x8: decode OPCODE_OP_BOTTOM3 {
912 0x2: cmpccsd_Vq_Wq_Ib();
913 default: Inst::UD2();
915 default: Inst::UD2();
919 0x1A: decode LEGACY_DECODEVAL {
921 0x0: decode OPCODE_OP_BOTTOM3 {
927 0x7: pmovmskb_Gd_PRq();
928 default: Inst::UD2();
931 0x4: decode OPCODE_OP_BOTTOM3 {
932 0x6: movq2dq_Vo_PRq();
933 default: Inst::UD2();
935 // operand size (0x66)
936 0x1: decode OPCODE_OP_BOTTOM3 {
937 0x0: addsubpd_Vo_Wo();
943 0x6: decode MODRM_MOD {
945 default: movq_Mq_Vq();
947 0x7: pmovmskb_Gd_VRo();
950 0x8: decode OPCODE_OP_BOTTOM3 {
951 0x0: addsubps_Vo_Wo();
952 0x6: movdq2q_Pq_VRq();
953 default: Inst::UD2();
955 default: Inst::UD2();
957 0x1B: decode LEGACY_DECODEVAL {
959 0x0: decode OPCODE_OP_BOTTOM3 {
960 0x0: psubusb_Pq_Qq();
961 0x1: psubusw_Pq_Qq();
964 0x4: paddusb_Pq_Qq();
965 0x5: paddusw_Pq_Qq();
969 // operand size (0x66)
970 0x1: decode OPCODE_OP_BOTTOM3 {
971 0x0: psubusb_Vo_Wo();
972 0x1: psubusw_Vo_Wo();
975 0x4: paddusb_Vo_Wo();
976 0x5: paddusw_Vo_Wo();
980 default: Inst::UD2();
982 0x1C: decode LEGACY_DECODEVAL {
984 0x0: decode OPCODE_OP_BOTTOM3 {
989 0x4: pmulhuw_Pq_Qq();
992 default: Inst::UD2();
995 0x4: decode OPCODE_OP_BOTTOM3 {
996 0x6: cvtdq2pd_Vo_Wq();
997 default: Inst::UD2();
999 // operand size (0x66)
1000 0x1: decode OPCODE_OP_BOTTOM3 {
1005 0x4: pmulhuw_Vo_Wo();
1006 0x5: pmulhw_Vo_Wo();
1007 0x6: cvttpd2dq_Vo_Wo();
1008 0x7: movntdq_Mo_Vo();
1011 0x8: decode OPCODE_OP_BOTTOM3 {
1012 0x6: cvtpd2dq_Vo_Wo();
1013 default: Inst::UD2();
1015 default: Inst::UD2();
1017 0x1D: decode LEGACY_DECODEVAL {
1019 0x0: decode OPCODE_OP_BOTTOM3 {
1020 0x0: psubsb_Pq_Qq();
1021 0x1: psubsw_Pq_Qq();
1022 0x2: pminsw_Pq_Qq();
1024 0x4: paddsb_Pq_Qq();
1025 0x5: paddsw_Pq_Qq();
1026 0x6: pmaxsw_Pq_Qq();
1029 // operand size (0x66)
1030 0x1: decode OPCODE_OP_BOTTOM3 {
1031 0x0: psubsb_Vo_Wo();
1032 0x1: psubsw_Vo_Wo();
1033 0x2: pminsw_Vo_Wo();
1035 0x4: paddsb_Vo_Wo();
1036 0x5: paddsw_Vo_Wo();
1037 0x6: pmaxsw_Vo_Wo();
1040 default: Inst::UD2();
1042 0x1E: decode OPCODE_OP_BOTTOM3 {
1044 0x0: decode OPCODE_OP_BOTTOM3 {
1048 0x4: pmuludq_Pq_Qq();
1049 0x5: pmaddwd_Pq_Qq();
1050 0x6: psadbw_Pq_Qq();
1051 0x7: maskmovq_Pq_PRq();
1052 default: Inst::UD2();
1054 // operand size (0x66)
1055 0x1: decode OPCODE_OP_BOTTOM3 {
1059 0x4: pmuludq_Vo_Wo();
1060 0x5: pmaddwd_Vo_Wo();
1061 0x6: psadbw_Vo_Wo();
1062 0x7: maskmovdqu_Vo_VRo();
1063 default: Inst::UD2();
1066 0x8: decode OPCODE_OP_BOTTOM3 {
1068 default: Inst::UD2();
1070 default: Inst::UD2();
1072 0x1F: decode LEGACY_DECODEVAL {
1074 0x0: decode OPCODE_OP_BOTTOM3 {
1084 // operand size (0x66)
1085 0x1: decode OPCODE_OP_BOTTOM3 {
1095 default: Inst::UD2();
1097 default: FailUnimpl::twoByteOps();
1100 default: M5InternalError::error(
1101 {{"Unexpected first opcode byte in two byte opcode!"}});