src/arch/x86/isa/insts/general_purpose/arithmetic/add_and_subtract.py

   1 # Copyright (c) 2007 The Hewlett-Packard Development Company
   2 # All rights reserved.
   3 #
   4 # Redistribution and use of this software in source and binary forms,
   5 # with or without modification, are permitted provided that the
   6 # following conditions are met:
   7 #
   8 # The software must be used only for Non-Commercial Use which means any
   9 # use which is NOT directed to receiving any direct monetary
  10 # compensation for, or commercial advantage from such use.  Illustrative
  11 # examples of non-commercial use are academic research, personal study,
  12 # teaching, education and corporate research & development.
  13 # Illustrative examples of commercial use are distributing products for
  14 # commercial advantage and providing services using the software for
  15 # commercial advantage.
  16 #
  17 # If you wish to use this software or functionality therein that may be
  18 # covered by patents for commercial use, please contact:
  19 #     Director of Intellectual Property Licensing
  20 #     Office of Strategy and Technology
  21 #     Hewlett-Packard Company
  22 #     1501 Page Mill Road
  23 #     Palo Alto, California  94304
  24 #
  25 # Redistributions of source code must retain the above copyright notice,
  26 # this list of conditions and the following disclaimer.  Redistributions
  27 # in binary form must reproduce the above copyright notice, this list of
  28 # conditions and the following disclaimer in the documentation and/or
  29 # other materials provided with the distribution.  Neither the name of
  30 # the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
  31 # contributors may be used to endorse or promote products derived from
  32 # this software without specific prior written permission.  No right of
  33 # sublicense is granted herewith.  Derivatives of the software and
  34 # output created using the software may be prepared, but only for
  35 # Non-Commercial Uses.  Derivatives of the software may be shared with
  36 # others provided: (i) the others agree to abide by the list of
  37 # conditions herein which includes the Non-Commercial Use restrictions;
  38 # and (ii) such Derivatives of the software include the above copyright
  39 # notice to acknowledge the contribution from this software where
  40 # applicable, this list of conditions and the disclaimer below.
  41 #
  42 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  43 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  44 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  45 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  46 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  47 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  48 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  49 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  50 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  51 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  52 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  53 #
  54 # Authors: Gabe Black
  55
  56 microcode = '''
  57 def macroop ADD_R_R
  58 {
  59     add reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF)
  60 };
  61
  62 def macroop ADD_R_I
  63 {
  64     limm t1, imm
  65     add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF)
  66 };
  67
  68 def macroop ADD_M_I
  69 {
  70     limm t2, imm
  71     ldst t1, seg, sib, disp
  72     add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
  73     st t1, seg, sib, disp
  74 };
  75
  76 def macroop ADD_P_I
  77 {
  78     rdip t7
  79     limm t2, imm
  80     ldst t1, seg, riprel, disp
  81     add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
  82     st t1, seg, riprel, disp
  83 };
  84
  85 def macroop ADD_LOCKED_M_I
  86 {
  87     limm t2, imm
  88     ldstl t1, seg, sib, disp
  89     add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
  90     stul t1, seg, sib, disp
  91 };
  92
  93 def macroop ADD_LOCKED_P_I
  94 {
  95     rdip t7
  96     limm t2, imm
  97     ldstl t1, seg, riprel, disp
  98     add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
  99     stul t1, seg, riprel, disp
 100 };
 101
 102 def macroop ADD_M_R
 103 {
 104     ldst t1, seg, sib, disp
 105     add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 106     st t1, seg, sib, disp
 107 };
 108
 109 def macroop ADD_P_R
 110 {
 111     rdip t7
 112     ldst t1, seg, riprel, disp
 113     add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 114     st t1, seg, riprel, disp
 115 };
 116
 117 def macroop ADD_LOCKED_M_R
 118 {
 119     ldstl t1, seg, sib, disp
 120     add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 121     stul t1, seg, sib, disp
 122 };
 123
 124 def macroop ADD_LOCKED_P_R
 125 {
 126     rdip t7
 127     ldstl t1, seg, riprel, disp
 128     add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 129     stul t1, seg, riprel, disp
 130 };
 131
 132 def macroop ADD_R_M
 133 {
 134     ld t1, seg, sib, disp
 135     add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF)
 136 };
 137
 138 def macroop ADD_R_P
 139 {
 140     rdip t7
 141     ld t1, seg, riprel, disp
 142     add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF)
 143 };
 144
 145 def macroop SUB_R_R
 146 {
 147     sub reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF)
 148 };
 149
 150 def macroop SUB_R_I
 151 {
 152     limm t1, imm
 153     sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF)
 154 };
 155
 156 def macroop SUB_R_M
 157 {
 158     ld t1, seg, sib, disp
 159     sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF)
 160 };
 161
 162 def macroop SUB_R_P
 163 {
 164     rdip t7
 165     ld t1, seg, riprel, disp
 166     sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF)
 167 };
 168
 169 def macroop SUB_M_I
 170 {
 171     limm t2, imm
 172     ldst t1, seg, sib, disp
 173     sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
 174     st t1, seg, sib, disp
 175 };
 176
 177 def macroop SUB_P_I
 178 {
 179     rdip t7
 180     limm t2, imm
 181     ldst t1, seg, riprel, disp
 182     sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
 183     st t1, seg, riprel, disp
 184 };
 185
 186 def macroop SUB_M_R
 187 {
 188     ldst t1, seg, sib, disp
 189     sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 190     st t1, seg, sib, disp
 191 };
 192
 193 def macroop SUB_P_R
 194 {
 195     rdip t7
 196     ldst t1, seg, riprel, disp
 197     sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 198     st t1, seg, riprel, disp
 199 };
 200
 201 def macroop ADC_R_R
 202 {
 203     adc reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF)
 204 };
 205
 206 def macroop ADC_R_I
 207 {
 208     limm t1, imm
 209     adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF)
 210 };
 211
 212 def macroop ADC_M_I
 213 {
 214     limm t2, imm
 215     ldst t1, seg, sib, disp
 216     adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
 217     st t1, seg, sib, disp
 218 };
 219
 220 def macroop ADC_P_I
 221 {
 222     rdip t7
 223     limm t2, imm
 224     ldst t1, seg, riprel, disp
 225     adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
 226     st t1, seg, riprel, disp
 227 };
 228
 229 def macroop ADC_LOCKED_M_I
 230 {
 231     limm t2, imm
 232     ldstl t1, seg, sib, disp
 233     adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
 234     stul t1, seg, sib, disp
 235 };
 236
 237 def macroop ADC_LOCKED_P_I
 238 {
 239     rdip t7
 240     limm t2, imm
 241     ldstl t1, seg, riprel, disp
 242     adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
 243     stul t1, seg, riprel, disp
 244 };
 245
 246 def macroop ADC_M_R
 247 {
 248     ldst t1, seg, sib, disp
 249     adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 250     st t1, seg, sib, disp
 251 };
 252
 253 def macroop ADC_P_R
 254 {
 255     rdip t7
 256     ldst t1, seg, riprel, disp
 257     adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 258     st t1, seg, riprel, disp
 259 };
 260
 261 def macroop ADC_LOCKED_M_R
 262 {
 263     ldstl t1, seg, sib, disp
 264     adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 265     stul t1, seg, sib, disp
 266 };
 267
 268 def macroop ADC_LOCKED_P_R
 269 {
 270     rdip t7
 271     ldstl t1, seg, riprel, disp
 272     adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 273     stul t1, seg, riprel, disp
 274 };
 275
 276 def macroop ADC_R_M
 277 {
 278     ld t1, seg, sib, disp
 279     adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF)
 280 };
 281
 282 def macroop ADC_R_P
 283 {
 284     rdip t7
 285     ld t1, seg, riprel, disp
 286     adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF)
 287 };
 288
 289 def macroop SBB_R_R
 290 {
 291     sbb reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF)
 292 };
 293
 294 def macroop SBB_R_I
 295 {
 296     limm t1, imm
 297     sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF)
 298 };
 299
 300 def macroop SBB_R_M
 301 {
 302     ld t1, seg, sib, disp
 303     sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF)
 304 };
 305
 306 def macroop SBB_R_P
 307 {
 308     rdip t7
 309     ld t1, seg, riprel, disp
 310     sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF)
 311 };
 312
 313 def macroop SBB_M_I
 314 {
 315     limm t2, imm
 316     ldst t1, seg, sib, disp
 317     sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
 318     st t1, seg, sib, disp
 319 };
 320
 321 def macroop SBB_P_I
 322 {
 323     rdip t7
 324     limm t2, imm
 325     ldst t1, seg, riprel, disp
 326     sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
 327     st t1, seg, riprel, disp
 328 };
 329
 330 def macroop SBB_LOCKED_M_I
 331 {
 332     limm t2, imm
 333     ldstl t1, seg, sib, disp
 334     sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
 335     stul t1, seg, sib, disp
 336 };
 337
 338 def macroop SBB_LOCKED_P_I
 339 {
 340     rdip t7
 341     limm t2, imm
 342     ldstl t1, seg, riprel, disp
 343     sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF)
 344     stul t1, seg, riprel, disp
 345 };
 346
 347 def macroop SBB_M_R
 348 {
 349     ldst t1, seg, sib, disp
 350     sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 351     st t1, seg, sib, disp
 352 };
 353
 354 def macroop SBB_P_R
 355 {
 356     rdip t7
 357     ldst t1, seg, riprel, disp
 358     sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 359     st t1, seg, riprel, disp
 360 };
 361
 362 def macroop SBB_LOCKED_M_R
 363 {
 364     ldstl t1, seg, sib, disp
 365     sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 366     stul t1, seg, sib, disp
 367 };
 368
 369 def macroop SBB_LOCKED_P_R
 370 {
 371     rdip t7
 372     ldstl t1, seg, riprel, disp
 373     sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
 374     stul t1, seg, riprel, disp
 375 };
 376
 377 def macroop NEG_R
 378 {
 379     sub reg, t0, reg, flags=(CF,OF,SF,ZF,AF,PF)
 380 };
 381
 382 def macroop NEG_M
 383 {
 384     ldst t1, seg, sib, disp
 385     sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF)
 386     st t1, seg, sib, disp
 387 };
 388
 389 def macroop NEG_P
 390 {
 391     rdip t7
 392     ldst t1, seg, riprel, disp
 393     sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF)
 394     st t1, seg, riprel, disp
 395 };
 396 '''