src/arch/x86/isa/macroop.isa

   1 // -*- mode:c++ -*-
   2
   3 // Copyright (c) 2007 The Hewlett-Packard Development Company
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  44 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  45 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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  54 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  55 //
  56 // Authors: Gabe Black
  57
  58 //////////////////////////////////////////////////////////////////////////////
  59 //
  60 //  Architecture independent
  61 //
  62
  63 // Execute method for macroops.
  64 def template MacroExecPanic {{
  65         Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
  66         {
  67             panic("Tried to execute macroop directly!");
  68             return NoFault;
  69         }
  70 }};
  71
  72 output header {{
  73
  74         // Base class for combinationally generated macroops
  75         class Macroop : public X86ISA::MacroopBase
  76         {
  77           public:
  78             Macroop(const char *mnem, ExtMachInst _machInst,
  79                     uint32_t _numMicroops, X86ISA::EmulEnv _env)
  80                         : MacroopBase(mnem, _machInst, _numMicroops, _env)
  81             {}
  82             %(MacroExecPanic)s
  83         };
  84 }};
  85
  86 //////////////////////////////////////////////////////////////////////////////
  87 //
  88 //  X86 specific
  89 //
  90 //////////////////////////////////////////////////////////////////////////////
  91
  92 // Basic instruction class declaration template.
  93 def template MacroDeclare {{
  94         namespace X86Macroop
  95         {
  96             /**
  97              * Static instruction class for "%(mnemonic)s".
  98              */
  99             class %(class_name)s : public %(base_class)s
 100             {
 101               private:
 102                 %(declareLabels)s
 103               public:
 104                 // Constructor.
 105                 %(class_name)s(ExtMachInst machInst, X86ISA::EmulEnv _env);
 106
 107                 std::string
 108                 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 109             };
 110         };
 111 }};
 112
 113 def template MacroDisassembly {{
 114     std::string
 115     X86Macroop::%(class_name)s::generateDisassembly(Addr pc,
 116             const SymbolTable *symtab) const
 117     {
 118         std::stringstream out;
 119         out << mnemonic << "\t";
 120
 121         int regSize = %(regSize)s;
 122         %(disassembly)s
 123         // Shut up gcc.
 124         regSize = regSize;
 125         return out.str();
 126     }
 127 }};
 128
 129 // Basic instruction class constructor template.
 130 def template MacroConstructor {{
 131         inline X86Macroop::%(class_name)s::%(class_name)s(
 132                 ExtMachInst machInst, EmulEnv _env)
 133             : %(base_class)s("%(mnemonic)s", machInst, %(num_microops)s, _env)
 134         {
 135             %(adjust_env)s;
 136             %(adjust_imm)s;
 137             %(adjust_disp)s;
 138             %(init_env)s;
 139             %(constructor)s;
 140             const char *macrocodeBlock = "%(class_name)s";
 141             //alloc_microops is the code that sets up the microops
 142             //array in the parent class.
 143             %(alloc_microops)s;
 144         }
 145 }};
 146
 147 let {{
 148     from micro_asm import Combinational_Macroop, Rom_Macroop
 149     class X86Macroop(Combinational_Macroop):
 150         def add_microop(self, mnemonic, microop):
 151             microop.mnemonic = mnemonic
 152             microop.micropc = len(self.microops)
 153             self.microops.append(microop)
 154         def setAdjustEnv(self, val):
 155             self.adjust_env = val
 156         def adjustImm(self, val):
 157             self.adjust_imm += val
 158         def adjustDisp(self, val):
 159             self.adjust_disp += val
 160         def __init__(self, name):
 161             super(X86Macroop, self).__init__(name)
 162             self.directives = {
 163                 "adjust_env" : self.setAdjustEnv,
 164                 "adjust_imm" : self.adjustImm,
 165                 "adjust_disp" : self.adjustDisp
 166             }
 167             self.declared = False
 168             self.adjust_env = ""
 169             self.init_env = ""
 170             self.adjust_imm = '''
 171                 uint64_t adjustedImm = IMMEDIATE;
 172                 //This is to pacify gcc in case the immediate isn't used.
 173                 adjustedImm = adjustedImm;
 174             '''
 175             self.adjust_disp = '''
 176                 uint64_t adjustedDisp = DISPLACEMENT;
 177                 //This is to pacify gcc in case the displacement isn't used.
 178                 adjustedDisp = adjustedDisp;
 179             '''
 180         def getAllocator(self, env):
 181             return "new X86Macroop::%s(machInst, %s)" % \
 182                     (self.name, env.getAllocator())
 183         def getMnemonic(self):
 184             mnemonic = self.name.lower()
 185             mnemonic = re.match(r'[^_]*', mnemonic).group(0)
 186             return mnemonic
 187         def getDeclaration(self):
 188             #FIXME This first parameter should be the mnemonic. I need to
 189             #write some code which pulls that out
 190             declareLabels = ""
 191             for (label, microop) in self.labels.items():
 192                 declareLabels += "const static uint64_t label_%s = %d;\n" \
 193                                   % (label, microop.micropc)
 194             iop = InstObjParams(self.getMnemonic(), self.name, "Macroop",
 195                     {"code" : "",
 196                      "declareLabels" : declareLabels
 197                     })
 198             return MacroDeclare.subst(iop);
 199         def getDefinition(self, env):
 200             #FIXME This first parameter should be the mnemonic. I need to
 201             #write some code which pulls that out
 202             numMicroops = len(self.microops)
 203             allocMicroops = ''
 204             micropc = 0
 205             for op in self.microops:
 206                 isLast = (micropc == numMicroops - 1)
 207                 allocMicroops += \
 208                     "microops[%d] = %s;\n" % \
 209                     (micropc, op.getAllocator(True, not isLast,
 210                                               micropc == 0, isLast))
 211                 micropc += 1
 212             if env.useStackSize:
 213                 useStackSize = "true"
 214             else:
 215                 useStackSize = "false"
 216             if env.memoryInst:
 217                 memoryInst = "true"
 218             else:
 219                 memoryInst = "false"
 220             regSize = '''(%s || (env.base == INTREG_RSP && %s) ?
 221                          env.stackSize :
 222                          env.dataSize)''' % (useStackSize, memoryInst)
 223             iop = InstObjParams(self.getMnemonic(), self.name, "Macroop",
 224                                 {"code" : "", "num_microops" : numMicroops,
 225                                  "alloc_microops" : allocMicroops,
 226                                  "adjust_env" : self.adjust_env,
 227                                  "adjust_imm" : self.adjust_imm,
 228                                  "adjust_disp" : self.adjust_disp,
 229                                  "disassembly" : env.disassembly,
 230                                  "regSize" : regSize,
 231                                  "init_env" : self.initEnv})
 232             return MacroConstructor.subst(iop) + \
 233                    MacroDisassembly.subst(iop);
 234 }};
 235
 236 let {{
 237     class EmulEnv(object):
 238         def __init__(self):
 239             self.reg = "0"
 240             self.regUsed = False
 241             self.regm = "0"
 242             self.regmUsed = False
 243             self.seg = "SEGMENT_REG_DS"
 244             self.size = None
 245             self.addressSize = "ADDRSIZE"
 246             self.dataSize = "OPSIZE"
 247             self.stackSize = "STACKSIZE"
 248             self.doModRM = False
 249             self.disassembly = ""
 250             self.firstArgument = True
 251             self.useStackSize = False
 252             self.memoryInst = False
 253
 254         def addToDisassembly(self, code):
 255             if not self.firstArgument:
 256                 self.disassembly += "out << \", \";\n"
 257             self.firstArgument = False
 258             self.disassembly += code
 259
 260         def getAllocator(self):
 261             if self.size == 'b':
 262                 self.dataSize = 1
 263             elif self.size == 'd':
 264                 self.dataSize = 4
 265             #This is for "double plus" which is normally a double word unless
 266             #the REX W bit is set, in which case it's a quad word. It's used
 267             #for some SSE instructions.
 268             elif self.size == 'dp':
 269                 self.dataSize = "(REX_W ? 8 : 4)"
 270             elif self.size == 'q':
 271                 self.dataSize = 8
 272             elif self.size == 'v':
 273                 self.dataSize = "OPSIZE"
 274             elif self.size == 'w':
 275                 self.dataSize = 2
 276             elif self.size == 'z':
 277                 self.dataSize = "((OPSIZE == 8) ? 4 : OPSIZE)"
 278             elif self.size:
 279                 raise Exception, "Unrecognized size type %s!" % self.size
 280             return '''EmulEnv(%(reg)s,
 281                               %(regm)s,
 282                               %(dataSize)s,
 283                               %(addressSize)s,
 284                               %(stackSize)s)''' % \
 285                 self.__dict__
 286
 287         def addReg(self, reg):
 288             if not self.regUsed:
 289                 self.reg = reg
 290                 self.regUsed = True
 291             elif not self.regmUsed:
 292                 self.regm = reg
 293                 self.regmUsed = True
 294             else:
 295                 raise Exception, "EmulEnv is out of register specialization spots."
 296         def setSize(self, size):
 297             if not self.size:
 298                 self.size = size
 299             else:
 300                 if self.size != size:
 301                     raise Exception, "Conflicting register sizes %s and %s!" %\
 302                         (self.size, size)
 303 }};
 304
 305 let {{
 306     doModRMString = "env.doModRM(machInst);\n"
 307     noModRMString = "env.setSeg(machInst);\n"
 308     def genMacroop(Name, env):
 309         blocks = OutputBlocks()
 310         if not macroopDict.has_key(Name):
 311             raise Exception, "Unrecognized instruction: %s" % Name
 312         macroop = macroopDict[Name]
 313         if not macroop.declared:
 314             if env.doModRM:
 315                 macroop.initEnv = doModRMString
 316             else:
 317                 macroop.initEnv = noModRMString
 318             blocks.header_output = macroop.getDeclaration()
 319             blocks.decoder_output = macroop.getDefinition(env)
 320             macroop.declared = True
 321         blocks.decode_block = "return %s;\n" % macroop.getAllocator(env)
 322         return blocks
 323 }};