Merge zizzer.eecs.umich.edu:/bk/newmem
[gem5.git] / src / arch / x86 / isa / microasm.isa
1 // -*- mode:c++ -*-
2
3 // Copyright (c) 2007 The Hewlett-Packard Development Company
4 // All rights reserved.
5 //
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40 // and (ii) such Derivatives of the software include the above copyright
41 // notice to acknowledge the contribution from this software where
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43 //
44 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
47 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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55 //
56 // Authors: Gabe Black
57
58 //Include the definitions of the micro ops.
59 //These are StaticInst classes which stand on their own and make up an
60 //internal instruction set, and also python representations which are passed
61 //into the microcode assembler.
62 ##include "microops/microops.isa"
63
64 //Include code to build macroops in both C++ and python.
65 ##include "macroop.isa"
66
67 let {{
68 import sys
69 sys.path[0:0] = ["src/arch/x86/isa/"]
70 from insts import microcode
71 # print microcode
72 from micro_asm import MicroAssembler, Rom_Macroop, Rom
73 mainRom = Rom('main ROM')
74 assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
75 # Add in symbols for the microcode registers
76 for num in range(15):
77 assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num
78 # Add in symbols for the segment descriptor registers
79 for letter in ("C", "D", "E", "F", "G", "S"):
80 assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
81 # Miscellaneous symbols
82 symbols = {
83 "reg" : "env.reg",
84 "regm" : "env.regm",
85 "imm" : "IMMEDIATE",
86 "disp" : "DISPLACEMENT",
87 "scale" : "env.scale",
88 "index" : "env.index",
89 "base" : "env.base",
90 "dsz" : "env.dataSize",
91 "osz" : "env.operandSize",
92 "ssz" : "env.stackSize"
93 }
94 assembler.symbols.update(symbols)
95
96 # Code literal which forces a default 64 bit operand size in 64 bit mode.
97 assembler.symbols["oszIn64Override"] = '''
98 if (machInst.mode.submode == SixtyFourBitMode &&
99 env.dataSize == 4)
100 env.dataSize = 8;
101 '''
102
103 macroopDict = assembler.assemble(microcode)
104 }};