src/arch/x86/isa/microops/specop.isa

   1 // Copyright (c) 2007-2008 The Hewlett-Packard Development Company
   2 // Copyright (c) 2011 Mark D. Hill and David A. Wood
   3 // All rights reserved.
   4 //
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  36
  37 //////////////////////////////////////////////////////////////////////////
  38 //
  39 // Fault Microop
  40 //
  41 //////////////////////////////////////////////////////////////////////////
  42
  43 output header {{
  44     class MicroFaultBase : public X86ISA::X86MicroopBase
  45     {
  46       protected:
  47         Fault fault;
  48         uint8_t cc;
  49
  50       public:
  51         MicroFaultBase(ExtMachInst _machInst, const char * instMnem,
  52                 uint64_t setFlags, Fault _fault, uint8_t _cc);
  53
  54         std::string generateDisassembly(Addr pc,
  55                 const SymbolTable *symtab) const;
  56     };
  57
  58     class MicroHalt : public X86ISA::X86MicroopBase
  59     {
  60       public:
  61         MicroHalt(ExtMachInst _machInst, const char * instMnem,
  62                 uint64_t setFlags) :
  63             X86MicroopBase(_machInst, "halt", instMnem,
  64                            setFlags | (ULL(1) << StaticInst::IsNonSpeculative) |
  65                            (ULL(1) << StaticInst::IsQuiesce),
  66                            No_OpClass)
  67         {
  68         }
  69
  70         Fault execute(ExecContext *, Trace::InstRecord *) const;
  71
  72         std::string generateDisassembly(Addr pc,
  73                 const SymbolTable *symtab) const;
  74     };
  75 }};
  76
  77 def template MicroFaultDeclare {{
  78     class %(class_name)s : public %(base_class)s
  79     {
  80       public:
  81         %(class_name)s(ExtMachInst _machInst, const char * instMnem,
  82                 uint64_t setFlags, Fault _fault, uint8_t _cc);
  83
  84         Fault execute(ExecContext *, Trace::InstRecord *) const;
  85     };
  86 }};
  87
  88 def template MicroFaultExecute {{
  89         Fault %(class_name)s::execute(ExecContext *xc,
  90                 Trace::InstRecord *traceData) const
  91         {
  92             %(op_decl)s;
  93             %(op_rd)s;
  94             if (%(cond_test)s) {
  95                 //Return the fault we were constructed with
  96                 return fault;
  97             } else {
  98                 return NoFault;
  99             }
 100         }
 101 }};
 102
 103 output exec {{
 104     Fault
 105     MicroHalt::execute(ExecContext *xc, Trace::InstRecord * traceData) const
 106     {
 107         xc->tcBase()->suspend();
 108         return NoFault;
 109     }
 110 }};
 111
 112 output decoder {{
 113     MicroFaultBase::MicroFaultBase(
 114             ExtMachInst machInst, const char * instMnem,
 115             uint64_t setFlags, Fault _fault, uint8_t _cc) :
 116         X86MicroopBase(machInst, "fault", instMnem, setFlags, No_OpClass),
 117                 fault(_fault), cc(_cc)
 118     {
 119     }
 120 }};
 121
 122 def template MicroFaultConstructor {{
 123     %(class_name)s::%(class_name)s(
 124             ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
 125             Fault _fault, uint8_t _cc) :
 126         %(base_class)s(machInst, instMnem, setFlags, _fault, _cc)
 127     {
 128         %(constructor)s;
 129     }
 130 }};
 131
 132 output decoder {{
 133     std::string MicroFaultBase::generateDisassembly(Addr pc,
 134             const SymbolTable *symtab) const
 135     {
 136         std::stringstream response;
 137
 138         printMnemonic(response, instMnem, mnemonic);
 139         if(fault)
 140             response << fault->name();
 141         else
 142             response << "No Fault";
 143
 144         return response.str();
 145     }
 146
 147     std::string MicroHalt::generateDisassembly(Addr pc,
 148             const SymbolTable *symtab) const
 149     {
 150         std::stringstream response;
 151
 152         printMnemonic(response, instMnem, mnemonic);
 153
 154         return response.str();
 155     }
 156 }};
 157
 158 let {{
 159     class Fault(X86Microop):
 160         className = "MicroFault"
 161         def __init__(self, fault, flags=None):
 162             self.fault = fault
 163             if flags:
 164                 if not isinstance(flags, (list, tuple)):
 165                     raise Exception, "flags must be a list or tuple of flags"
 166                 self.cond = " | ".join(flags)
 167                 self.className += "Flags"
 168             else:
 169                 self.cond = "0"
 170
 171         def getAllocator(self, microFlags):
 172             allocator = '''new %(class_name)s(machInst, macrocodeBlock,
 173                     %(flags)s, %(fault)s, %(cc)s)''' % {
 174                 "class_name" : self.className,
 175                 "flags" : self.microFlagsText(microFlags),
 176                 "fault" : self.fault,
 177                 "cc" : self.cond}
 178             return allocator
 179
 180     iop = InstObjParams("fault", "MicroFaultFlags", "MicroFaultBase",
 181             {"code": "",
 182              "cond_test": "checkCondition(ccFlagBits | cfofBits | dfBit | \
 183                                           ecfBit | ezfBit, cc)"})
 184     exec_output = MicroFaultExecute.subst(iop)
 185     header_output = MicroFaultDeclare.subst(iop)
 186     decoder_output = MicroFaultConstructor.subst(iop)
 187     iop = InstObjParams("fault", "MicroFault", "MicroFaultBase",
 188             {"code": "",
 189              "cond_test": "true"})
 190     exec_output += MicroFaultExecute.subst(iop)
 191     header_output += MicroFaultDeclare.subst(iop)
 192     decoder_output += MicroFaultConstructor.subst(iop)
 193     microopClasses["fault"] = Fault
 194
 195     class Halt(X86Microop):
 196         className = "MicroHalt"
 197         def __init__(self):
 198             pass
 199
 200         def getAllocator(self, microFlags):
 201             return "new MicroHalt(machInst, macrocodeBlock, %s)" % \
 202                     self.microFlagsText(microFlags)
 203
 204     microopClasses["halt"] = Halt
 205 }};
 206
 207 def template MicroFenceOpDeclare {{
 208     class %(class_name)s : public X86ISA::X86MicroopBase
 209     {
 210       public:
 211         %(class_name)s(ExtMachInst _machInst,
 212                 const char * instMnem,
 213                 uint64_t setFlags);
 214
 215         Fault execute(ExecContext *, Trace::InstRecord *) const;
 216     };
 217 }};
 218
 219 def template MicroFenceOpConstructor {{
 220     %(class_name)s::%(class_name)s(
 221             ExtMachInst machInst, const char * instMnem, uint64_t setFlags) :
 222         %(base_class)s(machInst, "%(mnemonic)s", instMnem,
 223                 setFlags, %(op_class)s)
 224     {
 225         %(constructor)s;
 226     }
 227 }};
 228
 229 let {{
 230     class MfenceOp(X86Microop):
 231         def __init__(self):
 232             self.className = "Mfence"
 233             self.mnemonic = "mfence"
 234             self.instFlags = "| (1ULL << StaticInst::IsMemBarrier)"
 235
 236         def getAllocator(self, microFlags):
 237             allocString = '''
 238                     (StaticInstPtr)(new %(class_name)s(machInst,
 239                         macrocodeBlock, %(flags)s))
 240             '''
 241             allocator = allocString % {
 242                 "class_name" : self.className,
 243                 "mnemonic" : self.mnemonic,
 244                 "flags" : self.microFlagsText(microFlags) + self.instFlags}
 245             return allocator
 246
 247     microopClasses["mfence"] = MfenceOp
 248 }};
 249
 250 let {{
 251     # Build up the all register version of this micro op
 252     iop = InstObjParams("mfence", "Mfence", 'X86MicroopBase',
 253             {"code" : ""})
 254     header_output += MicroFenceOpDeclare.subst(iop)
 255     decoder_output += MicroFenceOpConstructor.subst(iop)
 256     exec_output += BasicExecute.subst(iop)
 257 }};