src/arch/x86/isa/specialize.isa

   1 // -*- mode:c++ -*-
   2
   3 // Copyright (c) 2007 The Hewlett-Packard Development Company
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  55 //
  56 // Authors: Gabe Black
  57
  58 ////////////////////////////////////////////////////////////////////
  59 //
  60 //  Code to "specialize" a microcode sequence to use a particular
  61 //  variety of operands
  62 //
  63
  64 let {{
  65     # This code builds up a decode block which decodes based on switchval.
  66     # vals is a dict which matches case values with what should be decoded to.
  67     # Each element of the dict is a list containing a function and then the
  68     # arguments to pass to it.
  69     def doSplitDecode(switchVal, vals, default = None):
  70         blocks = OutputBlocks()
  71         blocks.decode_block = 'switch(%s) {\n' % switchVal
  72         for (val, todo) in vals.items():
  73             new_blocks = todo[0](*todo[1:])
  74             new_blocks.decode_block = \
  75                 '\tcase %s: %s\n' % (val, new_blocks.decode_block)
  76             blocks.append(new_blocks)
  77         if default:
  78             new_blocks = default[0](*default[1:])
  79             new_blocks.decode_block = \
  80                 '\tdefault: %s\n' % new_blocks.decode_block
  81             blocks.append(new_blocks)
  82         blocks.decode_block += '}\n'
  83         return blocks
  84 }};
  85
  86 let {{
  87     def doRipRelativeDecode(Name, opTypes, env):
  88         # print "RIPing %s with opTypes %s" % (Name, opTypes)
  89         env.memoryInst = True
  90         normEnv = copy.copy(env)
  91         normEnv.addToDisassembly(
  92                 '''printMem(out, env.seg, env.scale, env.index, env.base,
  93                     machInst.displacement, env.addressSize, false);''')
  94         normBlocks = specializeInst(Name + "_M", copy.copy(opTypes), normEnv)
  95         ripEnv = copy.copy(env)
  96         ripEnv.addToDisassembly(
  97                 '''printMem(out, env.seg, 1, 0, 0,
  98                     machInst.displacement, env.addressSize, true);''')
  99         ripBlocks = specializeInst(Name + "_P", copy.copy(opTypes), ripEnv)
 100
 101         blocks = OutputBlocks()
 102         blocks.append(normBlocks)
 103         blocks.append(ripBlocks)
 104
 105         blocks.decode_block = '''
 106         if(machInst.modRM.mod == 0 &&
 107           machInst.modRM.rm == 5 &&
 108           machInst.mode.submode == SixtyFourBitMode)
 109         { %s }
 110         else
 111         { %s }''' % \
 112          (ripBlocks.decode_block, normBlocks.decode_block)
 113         return blocks
 114 }};
 115
 116 let {{
 117     class OpType(object):
 118         parser = re.compile(r"(?P<tag>[A-Z]+)(?P<size>[a-z]*)|(r(?P<reg>[A-Z0-9]+)(?P<rsize>[a-z]*))")
 119         def __init__(self, opTypeString):
 120             match = OpType.parser.search(opTypeString)
 121             if match == None:
 122                 raise Exception, "Problem parsing operand type %s" % opTypeString
 123             self.reg = match.group("reg")
 124             self.tag = match.group("tag")
 125             self.size = match.group("size")
 126             if not self.size:
 127                 self.size = match.group("rsize")
 128
 129     ModRMRegIndex = "(MODRM_REG | (REX_R << 3))"
 130     ModRMRMIndex = "(MODRM_RM | (REX_B << 3))"
 131     InstRegIndex = "(OPCODE_OP_BOTTOM3 | (REX_B << 3))"
 132
 133     # This function specializes the given piece of code to use a particular
 134     # set of argument types described by "opTypes".
 135     def specializeInst(Name, opTypes, env):
 136         # print "Specializing %s with opTypes %s" % (Name, opTypes)
 137         while len(opTypes):
 138             # Parse the operand type string we're working with
 139             opType = OpType(opTypes[0])
 140             opTypes.pop(0)
 141
 142             if opType.tag not in ("I", "J", "P", "PR", "Q", "V", "VR", "W"):
 143                 if opType.size:
 144                     env.setSize(opType.size)
 145
 146             if opType.reg:
 147                 #Figure out what to do with fixed register operands
 148                 #This is the index to use, so we should stick it some place.
 149                 if opType.reg in ("A", "B", "C", "D"):
 150                     regString = "INTREG_R%sX" % opType.reg
 151                 else:
 152                     regString = "INTREG_R%s" % opType.reg
 153                 env.addReg(regString)
 154                 env.addToDisassembly(
 155                         "printReg(out, %s, regSize);\n" % regString)
 156                 Name += "_R"
 157             elif opType.tag == "B":
 158                 # This refers to registers whose index is encoded as part of the opcode
 159                 env.addToDisassembly(
 160                         "printReg(out, %s, regSize);\n" % InstRegIndex)
 161                 Name += "_R"
 162                 env.addReg(InstRegIndex)
 163             elif opType.tag == "M":
 164                 # This refers to memory. The macroop constructor sets up modrm
 165                 # addressing. Non memory modrm settings should cause an error.
 166                 env.doModRM = True
 167                 return doRipRelativeDecode(Name, opTypes, env)
 168             elif opType.tag == None or opType.size == None:
 169                 raise Exception, "Problem parsing operand tag: %s" % opType.tag
 170             elif opType.tag == "C":
 171                 # A control register indexed by the "reg" field
 172                 env.addReg(ModRMRegIndex)
 173                 env.addToDisassembly(
 174                         "ccprintf(out, \"CR%%d\", %s);\n" % ModRMRegIndex)
 175                 Name += "_C"
 176             elif opType.tag == "D":
 177                 # A debug register indexed by the "reg" field
 178                 env.addReg(ModRMRegIndex)
 179                 env.addToDisassembly(
 180                         "ccprintf(out, \"DR%%d\", %s);\n" % ModRMRegIndex)
 181                 Name += "_D"
 182             elif opType.tag == "S":
 183                 # A segment selector register indexed by the "reg" field
 184                 env.addReg(ModRMRegIndex)
 185                 env.addToDisassembly(
 186                         "printSegment(out, %s);\n" % ModRMRegIndex)
 187                 Name += "_S"
 188             elif opType.tag in ("G", "P", "T", "V"):
 189                 # Use the "reg" field of the ModRM byte to select the register
 190                 env.addReg(ModRMRegIndex)
 191                 env.addToDisassembly(
 192                         "printReg(out, %s, regSize);\n" % ModRMRegIndex)
 193                 if opType.tag == "P":
 194                     Name += "_MMX"
 195                 elif opType.tag == "V":
 196                     Name += "_XMM"
 197                 else:
 198                     Name += "_R"
 199             elif opType.tag in ("E", "Q", "W"):
 200                 # This might refer to memory or to a register. We need to
 201                 # divide it up farther.
 202                 regEnv = copy.copy(env)
 203                 regEnv.addReg(ModRMRMIndex)
 204                 regEnv.addToDisassembly(
 205                         "printReg(out, %s, regSize);\n" % ModRMRMIndex)
 206                 # This refers to memory. The macroop constructor should set up
 207                 # modrm addressing.
 208                 memEnv = copy.copy(env)
 209                 memEnv.doModRM = True
 210                 regSuffix = "_R"
 211                 if opType.tag == "Q":
 212                     regSuffix = "_MMX"
 213                 elif opType.tag == "W":
 214                     regSuffix = "_XMM"
 215                 return doSplitDecode("MODRM_MOD",
 216                     {"3" : (specializeInst, Name + regSuffix,
 217                             copy.copy(opTypes), regEnv)},
 218                            (doRipRelativeDecode, Name,
 219                             copy.copy(opTypes), memEnv))
 220             elif opType.tag in ("I", "J"):
 221                 # Immediates
 222                 env.addToDisassembly(
 223                         "ccprintf(out, \"%#x\", machInst.immediate);\n")
 224                 Name += "_I"
 225             elif opType.tag == "O":
 226                 # Immediate containing a memory offset
 227                 Name += "_MI"
 228             elif opType.tag in ("PR", "R", "VR"):
 229                 # Non register modrm settings should cause an error
 230                 env.addReg(ModRMRMIndex)
 231                 env.addToDisassembly(
 232                         "printReg(out, %s, regSize);\n" % ModRMRMIndex)
 233                 if opType.tag == "PR":
 234                     Name += "_MMX"
 235                 elif opType.tag == "VR":
 236                     Name += "_XMM"
 237                 else:
 238                     Name += "_R"
 239             elif opType.tag in ("X", "Y"):
 240                 # This type of memory addressing is for string instructions.
 241                 # They'll use the right index and segment internally.
 242                 if opType.tag == "X":
 243                     env.addToDisassembly(
 244                             '''printMem(out, env.seg,
 245                                 1, X86ISA::ZeroReg, X86ISA::INTREG_RSI, 0,
 246                                 env.addressSize, false);''')
 247                 else:
 248                     env.addToDisassembly(
 249                             '''printMem(out, SEGMENT_REG_ES,
 250                                 1, X86ISA::ZeroReg, X86ISA::INTREG_RDI, 0,
 251                                 env.addressSize, false);''')
 252                 Name += "_M"
 253             else:
 254                 raise Exception, "Unrecognized tag %s." % opType.tag
 255
 256         # Generate code to return a macroop of the given name which will
 257         # operate in the "emulation environment" env
 258         return genMacroop(Name, env)
 259 }};