src/arch/x86/isa_traits.hh

   1 /*
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  55  * Authors: Gabe Black
  56  */
  57
  58 #ifndef __ARCH_X86_ISATRAITS_HH__
  59 #define __ARCH_X86_ISATRAITS_HH__
  60
  61 #include "arch/x86/intregs.hh"
  62 #include "arch/x86/types.hh"
  63 #include "arch/x86/x86_traits.hh"
  64 #include "sim/host.hh"
  65
  66 class StaticInstPtr;
  67
  68 namespace LittleEndianGuest {}
  69
  70 namespace X86ISA
  71 {
  72     //This makes sure the little endian version of certain functions
  73     //are used.
  74     using namespace LittleEndianGuest;
  75
  76     // X86 does not have a delay slot
  77 #define ISA_HAS_DELAY_SLOT 0
  78
  79     // X86 NOP (XCHG rAX, rAX)
  80     //XXX This needs to be set to an intermediate instruction struct
  81     //which encodes this instruction
  82
  83     // These enumerate all the registers for dependence tracking.
  84     enum DependenceTags {
  85         //There are 16 microcode registers at the moment. This is an
  86         //unusually large constant to make sure there isn't overflow.
  87         FP_Base_DepTag = 128,
  88         Ctrl_Base_DepTag =
  89             FP_Base_DepTag +
  90             //mmx/x87 registers
  91             8 +
  92             //xmm registers
  93             16 +
  94             //The indices that are mapped over the fp stack
  95             8
  96     };
  97
  98     // semantically meaningful register indices
  99     //There is no such register in X86
 100     const int ZeroReg = NUM_INTREGS;
 101     const int StackPointerReg = INTREG_RSP;
 102     //X86 doesn't seem to have a link register
 103     const int ReturnAddressReg = 0;
 104     const int ReturnValueReg = INTREG_RAX;
 105     const int FramePointerReg = INTREG_RBP;
 106     const int ArgumentReg[] = {
 107         INTREG_RDI,
 108         INTREG_RSI,
 109         INTREG_RDX,
 110         //This argument register is r10 for syscalls and rcx for C.
 111         INTREG_R10W,
 112         //INTREG_RCX,
 113         INTREG_R8W,
 114         INTREG_R9W
 115     };
 116     const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
 117
 118     // Some OS syscalls use a second register (rdx) to return a second
 119     // value
 120     const int SyscallPseudoReturnReg = INTREG_RDX;
 121
 122     //XXX These numbers are bogus
 123     const int MaxInstSrcRegs = 10;
 124     const int MaxInstDestRegs = 10;
 125
 126     //4k. This value is not constant on x86.
 127     const int LogVMPageSize = 12;
 128     const int VMPageSize = (1 << LogVMPageSize);
 129
 130     const int PageShift = 13;
 131     const int PageBytes = 1ULL << PageShift;
 132
 133     const int BranchPredAddrShiftAmt = 0;
 134
 135     StaticInstPtr decodeInst(ExtMachInst);
 136
 137     const Addr LoadAddrMask = ULL(0xffffffffff);
 138 };
 139
 140 #endif // __ARCH_X86_ISATRAITS_HH__