Include the x86 specific traits file.
[gem5.git] / src / arch / x86 / isa_traits.hh
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55 * Authors: Gabe Black
56 */
57
58 #ifndef __ARCH_X86_ISATRAITS_HH__
59 #define __ARCH_X86_ISATRAITS_HH__
60
61 #include "arch/x86/x86_traits.hh"
62
63 namespace LittleEndianGuest {}
64
65 namespace X86ISA
66 {
67 //This makes sure the little endian version of certain functions
68 //are used.
69 using namespace LittleEndianGuest;
70
71 // X86 does not have a delay slot
72 #define ISA_HAS_DELAY_SLOT 0
73
74 // X86 NOP (XCHG rAX, rAX)
75 //XXX This needs to be set to an intermediate instruction struct
76 //which encodes this instruction
77
78 // These enumerate all the registers for dependence tracking.
79 enum DependenceTags {
80 //The number of microcode registers needs to be added to this
81 FP_Base_DepTag = 16,
82 Ctrl_Base_DepTag =
83 FP_Base_DepTag +
84 //mmx/x87 registers
85 8 +
86 //xmm registers
87 16
88 };
89
90 // semantically meaningful register indices
91 //There is no such register in X86
92 const int ZeroReg = 0;
93 const int StackPointerReg = 4; //RSP
94 //X86 doesn't seem to have a link register
95 const int ReturnAddressReg = 0;
96 const int ReturnValueReg = 0; //RAX
97 const int FramePointerReg = 5; //RBP
98 const int ArgumentReg0 = 7; //RDI
99 const int ArgumentReg1 = 6; //RSI
100 const int ArgumentReg2 = 2; //RDX
101 const int ArgumentReg3 = 1; //RCX
102 const int ArgumentReg4 = 8; //R8W
103 const int ArgumentReg5 = 9; //R9W
104
105 // Some OS syscalls use a second register (rdx) to return a second
106 // value
107 const int SyscallPseudoReturnReg = 2; //RDX
108
109 //XXX These numbers are bogus
110 const int MaxInstSrcRegs = 10;
111 const int MaxInstDestRegs = 10;
112
113 //4k. This value is not constant on x86.
114 const int LogVmPageSize = 12;
115 const int VMPageSize = (1 << LogVmPageSize);
116
117 const int BranchPredAddrShiftAmt = 0;
118 };
119
120 #endif // __ARCH_X86_ISATRAITS_HH__